參數(shù)資料
型號： SDCFBI-30-101
廠商： SANDISK CORP
元件分類： 存儲控制器/管理單元
英文描述： FLASH MEMORY DRIVE CONTROLLER, XMA50
封裝： PC CARD-50
文件頁數(shù)： 46/124頁
文件大小： 769K
代理商： SDCFBI-30-101
CompactFlash Memory Card Product Manual
SanDisk CompactFlash Memory Card Product Manual 1999 SANDISK CORPORATION
28
Table 4-2 Signal Description (continued)
Signal Name
Dir.
Pin
Description
-IOWR
(PC Card Memory Mode)
I
35
This signal is not used in this mode.
-IOWR
(PC Card I/O Mode)
The I/O Write strobe pulse is used to clock I/O data on the Card
Data bus into the CompactFlash controller registers when the
card is configured to use the I/O interface.
The clocking will occur on the negative to positive edge of the
signal (trailing edge).
-IOWR
(True IDE Mode)
In True IDE Mode, this signal has the same function as in PC
Card I/O Mode.
-OE
(PC Card Memory Mode)
I
9
This is an Output Enable strobe generated by the host interface.
It is used to read data from the CompactFlash Card in Memory
Mode and to read the CIS and configuration registers.
-OE
(PC Card I/O Mode)
In PC Card I/O Mode, this signal is used to read the CIS and
configuration registers.
-ATA SEL
(True IDE Mode)
To enable True IDE Mode this input should be grounded by the
host.
RDY/-BSY
(PC Card Memory Mode)
O
37
In Memory Mode this signal is set high when the CompactFlash
Card is ready to accept a new data transfer operation and held
low when the card is busy. The Host memory card socket must
provide a pull-up resistor.
At power up and at Reset, the RDY/-BSY signal is held low
(busy) until the CompactFlash Card has completed its power up
or reset function. No access of any type should be made to the
CompactFlash Card during this time. The RDY/-BSY signal is
held high (disabled from being busy) whenever the following
condition is true: The CompactFlash Card has been powered up
with +RESET continuously disconnected or asserted.
-IREQ
( PC Card I/O Mode)
I/O Operation - After the CompactFlash Card has been
configured for I/O operation, this signal is used as -Interrupt
Request. This line is strobed low to generate a pulse mode
interrupt or held low for a level mode interrupt.
INTRQ
(True IDE Mode)
In True IDE Mode signal is the active high Interrupt Request to
the host.
-REG
(PC Card Memory Mode)
Attribute Memory Select
I
44
This signal is used during Memory Cycles to distinguish between
Common Memory and Register (Attribute) Memory accesses.
High for Common Memory, Low for Attribute Memory.
-REG
(PC Card I/O Mode)
The signal must also be active (low) during I/O Cycles when the
I/O address is on the Bus.
-REG
(True IDE Mode)
In True IDE Mode this input signal is not used and should be
connected to VCC by the host.
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