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參數(shù)資料
| 型號(hào)： | SDA9589X |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs |
| 中文描述： | 畫中畫四先進(jìn)SOPHISTICUS高端畫中畫，圖像芯片 |
| 文件頁數(shù)： | 33/102頁 |
| 文件大?。?/td> | 2306K |
| 代理商： | SDA9589X |
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Micronas
4-33
SDA 9489X
SDA 9589X
System Description
Preliminary Data Sheet
4096 frame colors are programmable by
FRY
,
FRU
, and
FRV
, 4 bits for each
component. Horizontal and vertical width of the frame are programmable independently
by
FRWIDH
and
FRWIDV
. If desired, frame color is displayed over the whole PIP size
or whole picture size of the main channel when
PIPBG
is set accordingly. 64 background
colors are programmable by
BGY
,
BGU
,
BGV
, 2 bits for each component. Alternatively
BGFRC
sets the background to frame color.
4.8.4
To remove dark stripes at 16:9 inset pictures the vertical display area is shrinkable with
VPSRED
. The number of omitted lines depends on the vertical decimation factor.
16:9 Inset Picture Support
Table 4-19
Number of lines without and with reduction of vertical picture size
.
Figure 4-15
16:9 inset picture without and with reduction of vertical picture size
4.8.5
The phase of the output signals is locked to the rising edge of the horizontal sync pulse.
The frequency varies in a certain range to ensure correct aspect ratio for 16:9
applications depending on
HZOOM
. The horizontal and vertical scaling can be used for
all display frequencies.
Parent Clock Generation
vertical
decimation
factor
displayed
lines (50Hz)
displayed
lines (50Hz)
with reduction
displayed
lines (60Hz)
displayed
lines (60Hz)
with reduction
1
264
214
216
175
...
6
44
35
36
29
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