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參數(shù)資料
| 型號(hào)： | SDA9589X |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs |
| 中文描述： | 畫中畫四先進(jìn)SOPHISTICUS高端畫中畫，圖像芯片 |
| 文件頁(yè)數(shù)： | 10/102頁(yè) |
| 文件大?。?/td> | 2306K |
| 代理商： | SDA9589X |
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SDA 9489X
SDA 9589X
System Description
Micronas
4-10
Preliminary Data Sheet
4
System Description
4.1
Analog Frontend
4.1.1
An analog inset CVBS signal can be fed to the inputs CVBS1-3 of SDA 9589X/SDA
9489X. Each of these sources is selectable via I
2
C bus (
CVBSEL
). CVBS2 and CVBS3
can be used as separate Y/C inputs. At SDA 9589X YUV sources can be connected to
CVBS1, CVBS2 and CVBS3 provided YUV operation being enabled (
YUVSEL
). Using
an external switch SDA 9589X can operate in applications with both YUV and CVBS
signals.
Input Selection
4.1.2
All signal are clamped and AD-converted with an amplitude resolution of 8bit. CVBS and
Y signals are clamped to the sync bottom whereas U/V and C signals are clamped to
their mid-level during blanking.
AD-Conversion
Figure 4-1
Clamping timing
CVBSEL
YUVSEL
Input
remark
D1
D0
CVBS1
CVBS2
CVBS3
0
0
0
CVBS
0
1
0
CVBS
1
0
0
Y (VBS)
C
Y/C mode
1
1
0
CVBS
X
X
1
Y (VBS)
U (CB)
V (CR)
YUV mode
(only SDA 9589X)
Table 4-1
Input selection
Inset
Video
HD
CLAMPI
CLMPID
CLMPIST
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