參數(shù)資料
型號： SDA9588X
廠商： MICRONAS SEMICONDUCTOR HOLDING AG
元件分類： 畫面疊加
英文描述： Cost-effective Picture-In-Picture ICs
中文描述： PICTURE-IN-PICTURE IC, PDSO28
封裝： SOIC-28
文件頁數(shù)： 8/87頁
文件大?。?/td> 2045K
代理商： SDA9588X
SDA 9488X
SDA 9588X
Pin Configuration
Micronas
2-8
Preliminary Data Sheet
Table 2-1
Pin Description
Numb
er
Name
Type
Description
1
XIN
I
crystal oscillator (input) or external clock input
2
XQ
O
crystal oscillator (output)
3
HSP
I/TTL
horizontal sync for parent channel
4
VSP
I/TTL
vertical sync for parent channel
5
SDA
I/O
I
2
C-bus data
6
SCL
I
I
2
C-bus clock
7
VDD
S
digital supply voltage
8
VSS
S
digital ground
9
I2C
I
I
2
C Address
10
INT
O/TTL
interrupt
11
IN1
I/ana
V/R input for external YUV/RGB source
12
IN2
I/ana
Y/G input for external YUV/RGB source
13
IN3
I/ana
U/B input for external YUV/RGB source
14
FSW
I
fast switch input for YUV/RGB switch
15
SEL
O
fast blanking output for PIP
16
OUT3
O/ana
analog output: chrominance signal +(B-Y) or -(B-Y) or B
17
OUT2
O/ana
analog output: luminance signal Y or G
18
OUT1
O/ana
analog output: chrominance signal +(R-Y) or -(R-Y) or R
19
VDDA2
S
analog supply voltage for DAC
20
VSSA2
S
analog ground for DAC
21
VREFH
I/ana
uppper reference voltage for ADC and DAC
22
VDDA1
S
analog supply voltage for ADC
23
VSSA1
S
analog ground for ADC
24
CVBS3
I/ana
CVBS3 or V (SDA 9588X) or C Input
25
VREFL
I/O
lower reference voltage for ADC
26
CVBS2
I/ana
CVBS2 or U (SDA 9588X) or Y (of Y/C) Input
27
VREFM
I/O
mid-level reference voltage for ADC
28
CVBS1
I/ana
CVBS1 or Y (of YUV, SDA 9588X) Input
I= Input / ana=analog / O= Output / TTL=Digital (TTL) / S=Supply voltage
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