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參數(shù)資料
| 型號： | SDA9588X |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分類： | 畫面疊加 |
| 英文描述： | Cost-effective Picture-In-Picture ICs |
| 中文描述： | PICTURE-IN-PICTURE IC, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 20/87頁 |
| 文件大?。?/td> | 2045K |
| 代理商： | SDA9588X |
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SDA 9488X
SDA 9588X
System Description
Micronas
4-20
Preliminary Data Sheet
Table 4-9
Multi-display modes
The display modes are shown in the appendix. The sizes of the partial pictures are listed
in table 4-9.
4.7
Display Control
The on-chip memory capacity is 512 kbits. Provided that the same standard (50 or 60
Hz)
video sources are applied to inset and parent channel, jointline-free frame mode
display is possible. This means that every incoming field is processed and displayed by
the SDA 9488X/SDA 9588X processor. The result is a high vertical and time resolution.
For this purpose the standard is analyzed internally and frame mode display is blocked
automatically, if the described restrictions are not fulfilled. Then only every second
incoming field is shown (field mode). Field mode normally shows jointlines. This is
caused by an update of the memory during read out. The result is that one part of the
picture contains new picture information and the other part contains one earlier written
field. The switching from or to frame mode is free of artifacts.
Activation of frame-mode display is blocked automatically if at least one of the following
conditions is not fulfilled:
Inset and parent channel have the same field repetition frequency. This means that
frame mode is possible only for 50Hz inset and parent sources or 60Hz inset and
parent sources.
Interlace signal is detected for inset and parent channel. For progressive scan or
(S)VGA display therefore only field mode is possible. For some VCRs in trick mode,
often no interlace is detected also.
The number of lines is within a predefined range for inset (
FMACTI
) or parent
(
FMACTP
) channel (assuming standard signals according to ITU)
Display
Mode
DISPMOD
Size
Picture
configuration
Pixel
Lines
D1
D0
625
525
1
0
0
SIZEHOR/
SIZEVER
HSRHNK/
VSHRNK
single PIP mode,
216
-
60
88
-
24
72
-
20
2
0
1
3 X1/9
one upon another
(same content)
216
264
216
3
1
0
4 X 1/16
one upon another
(same content)
156
264
216
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| SDA9489X | PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs |
| SDA9589X | PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs |
| SDB14 | 1.0 AMP. Schottky Barrier Rectifiers |
| SDB15 | 1.0 AMP. Schottky Barrier Rectifiers |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SDA9589X | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs |
| SDAB-15P | 制造商:HRS 制造商全稱:HRS 功能描述:STRAIGHT/METAL PCB D-SUB |
| SDAB-15P(55) | 制造商:Hirose Electric 功能描述:2.74mm 15 2 Zv^N ^Cv 39.14mm 350VAC 3A 5000M/500VDC 15m/100mA 1250VAC/1min. +85 -55 PBT/UL94V-0/ jbPbL+bL AWG#28 to #30 12.55mm Bulk |
| SDAB-15P05 | 制造商:HRS 制造商全稱:HRS 功能描述:STRAIGHT/METAL PCB D-SUB |
| SDAB-15S | 制造商:HRS 制造商全稱:HRS 功能描述:STRAIGHT/METAL PCB D-SUB |
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