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| 型號(hào)： | SDA9254-2 |
| 廠商： | SIEMENS A G |
| 元件分類： | DRAM |
| 英文描述： | 2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) with On-chip Noise Reduction Filter |
| 中文描述： | VIDEO DRAM, PQFP64 |
| 封裝： | PLASTIC, MQFP-64 |
| 文件頁(yè)數(shù)： | 9/32頁(yè) |
| 文件大?。?/td> | 183K |
| 代理商： | SDA9254-2 |
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SDA 9254-2
Semiconductor Group
9
1998-01-16
The beginning of a block of 16 serial data at port A or B is determined by RA and RB, respectively.
The end of the serial input data block at port C is controlled by WT. Since RA, RB and WT can be
independently chosen (except for small forbidden time windows when memory transfers are
executed), the serial data streams can be shifted against each other without influencing the RE
cycles.
For activated noise reduction the timing restrictions for RB and WT must be considered (see Data
Transfer from latch B to Shift Register B).
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