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參數(shù)資料
| 型號： | SAX-XC878M-16FFI3V3 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 24 MHz, RISC MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, TQFP-64 |
| 文件頁數(shù)： | 118/141頁 |
| 文件大?。?/td> | 2385K |
| 代理商： | SAX-XC878M-16FFI3V3 |
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XC878CLM
Functional Description
Data Sheet
71
V1.1, 2009-08
3.7.2
Booting Scheme
When the XC878 is reset, it must identify the type of configuration with which to start the
different modes once the reset sequence is complete. Thus, boot configuration
information that is required for activation of special modes and conditions needs to be
applied by the external world through input pins. After power-on reset or hardware reset,
the pins MBC, TMS and P0.0 collectively select the different boot options. Table 24
shows the available boot options in the XC878.
Note: The boot options are valid only with the default set of UART and JTAG pins.
Table 24
XC878 Boot Selection 1)
1) In addition to the pins MBC, TMS and P0.0, TM pin also requires an external pull down for all the boot options.
MBC
TMS P0.0
Type of Mode
PC Start Value
1
0
X
User Mode2); on-chip OSC/PLL non-bypassed
2) BSL mode is automatically entered if no valid password is installed and data at memory address 0000H equals
zero.
0000H
0
X
BSL Mode; (LIN Mode3), UART/ MultiCAN
Mode4)5) and Alternate BSL Mode6)); on-chip
OSC/PLL non-bypassed
3) If a device is programmed as LIN, LIN BSL is always used instead of UART/MultiCAN.
4) UART or MultiCAN BSL is decoded by firmware based on the protocol for product variant with MultiCAN. If no
MultiCAN and LIN variant, UART BSL is used.
5) In MultiCAN BSL mode, the clock source is switched to XTAL by firmware, bypassing the on-chip oscillator.
This avoids any frequency invariance with the on-chip oscillator and allows other frequency clock input, thus
ensuring accurate baud rate detection (especially at high bit rates).
6) Alternate BSL Mode is a user defined BSL code programmed in Flash. It is entered if the AltBSLPassword is
valid.
0000H
0
1
0
OCDS Mode; on-chip OSC/PLL non-
bypassed
0000H
1
0
User (JTAG) Mode7); on-chip OSC/PLL non-
bypassed (normal)
7) Normal user mode with standard JTAG (TCK,TDI,TDO) pins for hot-attach purpose.
0000H
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