
XC878CLM
Functional Description
Data Sheet
56
V1.1, 2009-08
3.3
Flash Memory
The Flash memory provides an embedded user-programmable non-volatile memory,
allowing fast and reliable storage of user code and data. It is operated from a single 2.5 V
supply from the Embedded Voltage Regulator (EVR) and does not require additional
programming or erasing voltage. The pagination of the Flash memory allows each page
to be erased independently.
Features
In-System Programming (ISP) via UART
In-Application Programming (IAP)
Error Correction Code (ECC) for dynamic correction of single-bit errors
Background program and erase operations for CPU load minimization
Support for aborting erase operation
Minimum program width
of 1-byte for D-Flash and 2-bytes for P-Flash
1-page minimum erase width
1-byte read access
Flash is delivered in erased state (read all ones)
Operating supply voltage: 2.5 V ± 7.5 %
Read access time: 1 ×
t
CCLK =38 ns
1)
Program time for 1 wordline: 1.6 ms2)
Page erase time: 20 ms
Mass erase time: 200 ms
1) Values shown here are typical values.
f
sys = 144 MHz ± 7.5% (fCCLK = 24 MHz ± 7.5 %) is the maximum
frequency range for Flash read access.
2) Values shown here are typical values.
fsys = 144 MHz ± 7.5% (fCCLK = 24 MHz ± 7.5 %) is the typical frequency
range for Flash programming and erasing.
fsysmin is used for obtaining the worst case timing.