參數(shù)資料
型號: SAX-XC878M-16FFI3V3
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 24 MHz, RISC MICROCONTROLLER, PQFP64
封裝: PLASTIC, TQFP-64
文件頁數(shù): 113/141頁
文件大?。?/td> 2385K
代理商: SAX-XC878M-16FFI3V3
XC878CLM
Functional Description
Data Sheet
66
V1.1, 2009-08
3.4.3
Interrupt Priority
An interrupt that is currently being serviced can only be interrupted by a higher-priority
interrupt, but not by another interrupt of the same or lower priority. Hence, an interrupt of
the highest priority cannot be interrupted by any other interrupt request.
If two or more requests of different priority levels are received simultaneously, the
request of the highest priority is serviced first. If requests of the same priority are
received simultaneously, then an internal polling sequence determines which request is
serviced first. Thus, within each priority level, there is a second priority structure
determined by the polling sequence shown in Table 22.
Table 22
Priority Structure within Interrupt Level
Source
Level
Non-Maskable Interrupt (NMI)
(highest)
External Interrupt 0
1
Timer 0 Interrupt
2
External Interrupt 1
3
Timer 1 Interrupt
4
UART Interrupt
5
T2CCU,UART Normal Divider Overflow,
MultiCAN, LIN Interrupt
6
ADC, MultiCAN Interrupt
7
SSC Interrupt
8
External Interrupt 2, Timer 21, UART1, UART1
Normal Divider Overflow, MDU, CORDIC Interrupt
9
External Interrupt [6:3], MultiCAN Interrupt
10
CCU6 Interrupt Node Pointer 0, MultiCAN interrupt 11
CCU6 Interrupt Node Pointer 1, MultiCAN Interrupt 12
CCU6 Interrupt Node Pointer 2, MultiCAN Interrupt 13
CCU6 Interrupt Node Pointer 3, MultiCAN Interrupt 14
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