參數(shù)資料
型號: SAL-XC866L-4FRA
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 75 MHz, MICROCONTROLLER, PDSO38
封裝: GREEN, PLASTIC, TSSOP-38
文件頁數(shù): 30/113頁
文件大小: 2289K
代理商: SAL-XC866L-4FRA
SAL-XC866
Functional Description
PRELIMINARY
Data Sheet
19
V1.0, 2011-02
3.2.2
Special Function Register
The Special Function Registers (SFRs) occupy direct internal data memory space in the
range 80H to FFH. All registers, except the program counter, reside in the SFR area. The
SFRs include pointers and registers that provide an interface between the CPU and the
on-chip peripherals. As the 128-SFR range is less than the total number of registers
required, address extension mechanisms are required to increase the number of
addressable SFRs. The address extension mechanisms include:
Mapping
Paging
3.2.2.1
Address Extension by Mapping
Address extension is performed at the system level by mapping. The SFR area is
extended into two portions: the standard (non-mapped) SFR area and the mapped SFR
area. Each portion supports the same address range 80H to FFH, bringing the number
of addressable SFRs to 256. The extended address range is not directly controlled by
the CPU instruction itself, but is derived from bit RMAP in the system control register
SYSCON0 at address 8FH. To access SFRs in the mapped area, bit RMAP in SFR
SYSCON0 must be set. Alternatively, the SFRs in the standard area can be accessed
by clearing bit RMAP. The SFR area can be selected as shown in Figure 7.
SYSCON0
System Control Register 0
Reset Value: 00H
76
54
3
2
1
0
01
0
RMAP
rrw
r
rw
Field
Bits
Type Description
RMAP
0rw
Special Function Register Map Control
0
The access to the standard SFR area is
enabled.
1
The access to the mapped SFR area is
enabled.
1
2rw
Reserved
Returns the last value if read; should be written
with 1.
0
1,[7:3]
r
Reserved
Returns 0 if read; should be written with 0.
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