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參數(shù)資料
| 型號(hào)： | SAF-TC11IB-64D96EBC |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 96 MHz, RISC MICROCONTROLLER, PBGA388 |
| 封裝： | PLASTIC, BGA-388 |
| 文件頁(yè)數(shù)： | 58/110頁(yè) |
| 文件大?。?/td> | 1303K |
| 代理商： | SAF-TC11IB-64D96EBC |
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TC11IB
Data Sheet
47
V2.4, 2004-06
On-Chip Bus System
The TC11IB includes two bus systems:
– Local Memory Bus (LMB)
– On-Chip FPI Bus (Fast FPI and Slow FPI)
There are two bridges to interconnect these three buses. The LMB-to-FPI (LFI)
interfaces the Fast FPI bus to LMB Bus. The FPI-to-FPI (FFI) interfaces slow FPI bus to
Fast FPI bus.
Local Memory Bus (LMB)
The Local Memory Bus interconnects the memory units and functional units, such as
CPU and LMU. The main target of the LMB bus is to support devices with fast response
times, optimized for speed. This allows the DMU and PMU fast access to local memory
and reduces load on the FPI bus. The Tricore system itself is located on LMB bus. Via
External Bus Unit, it interconnects TC11IB and external components.
The Local Memory Bus is a synchronous, pipelined, split bus with variable block size
transfer support. It supports 8,16,32 & 64 bits single beat transactions and variable
length 64 bits block transfers.
Key Features
The LMB provides the following features:
Synchronous, Pipelined, Multi-master, 64-bit high performance bus
Support multiple bus masters
Support Split transactions
Support Variable block size transfer
Burst Mode Read/Write to Memories
Connect Caches and on-chip memory and Fast FPI Bus
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