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參數(shù)資料
| 型號： | SAF-TC11IB-64D96EBC |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 96 MHz, RISC MICROCONTROLLER, PBGA388 |
| 封裝： | PLASTIC, BGA-388 |
| 文件頁數(shù)： | 46/110頁 |
| 文件大?。?/td> | 1303K |
| 代理商： | SAF-TC11IB-64D96EBC |
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TC11IB
Data Sheet
36
V2.4, 2004-06
RB as well as TB provides on-chip data buffering whereas DMUR and DMUT perform
data transfer from/to the shared memory.
Two interfaces are provided by the Ethernet Controller Module:
1. MII interface for connection of Ethernet PHYs via eighteen Input / Output lines
2. Master/slave FPI bus interface for connection to the on-chip system bus for data
transfer as well as configuration.
Features
Media Independent Interface (MII) according to IEEE 802.3
Support 10 or 100 Mbps MII-based Physical devices.
Support Full Duplex Ethernet.
Support data transfer between Ethernet Controller and COM-DRAM.
Support data transfer between Ethernet Controller and SDRAM via EBU.
256 x 32 bit Receive buffer and Transmit buffer each.
Support burst transfers up to 8 x 32 Byte.
Media Access Controller (MAC)
100/10-Mbps operations
Full IEEE 802.3 compliance
Station management signaling
Large on-chip CAM (Content Addressable Memory)
Full duplex mode
80-byte transmit FIFO
16-byte receive FIFO
PAUSE Operation
Flexible MAC Control Support
Support Long Packet Mode and Short Packet Mode
PAD generation
Media Independent Interface (MII)
Media independence.
Multi-vendor point of interoperability.
Support connection of MAC layer and Physical (PHY) layer devices.
Capable of supporting both 100 Mb/s and 10 Mb/s data rates.
Data and delimiters are synchronous to clock references.
Provides independent four bit wide transmit and receive data paths.
Support connection of PHY layer and Station Management (STA) devices.
Provides a simple management interface.
Capable of driving a limited length of shielded cable.
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