參數(shù)資料
型號: SAF-TC1130-L150EBGREEN
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 150 MHz, MICROCONTROLLER, PBGA208
封裝: GREEN, PLASTIC, LBGA-208
文件頁數(shù): 3/117頁
文件大?。?/td> 1726K
代理商: SAF-TC1130-L150EBGREEN
TC1130
Electrical Parameters
Data Sheet
94
V1.0, 2005-02
Advance Information
Figure 4-10 EBU Clock Output Timing
4.3.8.3
Timing for SDRAM Access Signals
(Operating Conditions apply; CL =50 pF1))
1) If application conditions other than 50 pf capacitive load are used, then the proper correlation factor should be
used for your specific application condition. For design team, the load should be set according to the system
requirement.
2) The parameters are applicable for PC100 SDRAM access and the maximum SDCLKO is up to 100 MHz.
3) The parameters are applicable for PC133 SDRAM access and the maximum SDCLKO is up to 120 MHz.
Parameter
Symbol
Limits2)
Limits3)
Unit
min max min max
SDCLKO period
t1 CC
10
8.3
ns
CKE output valid time from SDCLKO
t1
CC
8.0
6.8
ns
CKE output hold time from SDCLKO
t2
CC 0
0.8
ns
Address output valid time from SDCLKO
t3
CC
8.0
6.8
ns
Address output hold time from SDCLKO
t4
CC 1.0
0.8
ns
CSx, RAS, CAS, RD/WR, BC(3:0) output
valid time from SDCLKO
t5
CC
8.0
6.8
ns
CSx, RAS, CAS, RD/WR, BC(3:0) output
hold time from SDCLKO
t6
CC 1.0
0.8
ns
AD(31:0) output valid time from SDCLKO
t7
CC
8.0
6.8
ns
AD(31:0) output hold time from SDCLKO
t8
CC 1.0
0.8
ns
AD(31:0) input setup time to SDCLKO
t9
SR 4.0
2.9
ns
AD(31:0) input hold time from SDCLKO
t10 SR 3.0
3.0
ns
BFCLKO /
SDCLKO
t
1
0.5 V
DD
t
2
t
3
t
5
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