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| 型號： | SAF-C515C-8EMCA |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, MQFP-80 |
| 文件頁數(shù)： | 76/97頁 |
| 文件大小： | 1298K |
| 代理商： | SAF-C515C-8EMCA |
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C515C
Data Sheet
74
2003-02
A/D Converter Characteristics (Operating Conditions apply)
Parameter
Symbol
Limit Values
Unit Test Condition
min.
max.
Analog input voltage
VAIN
VAGND
VAREF
V
1)
1) V
AIN may exceed VAGND or VAREF up to the absolute maximum ratings. However, the conversion result in
these cases will be X000H or X3FFH, respectively.
Sample time
tS
–16
× t
IN
8
× t
IN
ns
Prescaler
÷ 8
Prescaler
÷ 42)
2) During the sample time the input capacitance C
AIN can be charged/discharged by the external source. The
internal resistance of the analog source must allow the capacitance to reach their final voltage level within
tS.
After the end of the sample time
tS, changes of the analog input voltage have no effect on the conversion result.
Conversion cycle time
tADCC
–96
× t
IN
48
× t
IN
ns
Prescaler
÷ 8
Prescaler
÷ 43)
3) This parameter includes the sample time t
S, the time for determining the digital result and the time for the
calibration. Values for the conversion clock
tADC depend on programming and can be taken from the table on
the previous page.
Total unadjusted error
TUE
–
±2LSB 4)
4) T
UE is tested at VAREF = 5.0 V, VAGND = 0 V, VDD = 4.9 V. It is guaranteed by design characterization for all
other voltages within the defined voltage range.
If an overload condition occurs on maximum 2 not selected analog input pins and the absolute sum of input
overload currents on all analog input pins does not exceed 10 mA, an additional conversion error of 1/2 LSB
is permissible.
Internal resistance of
reference voltage source
RAREF
–
tADC / 250
- 0.25
k
tADC in [ns]
5)6)
5) During the conversion the ADC’s capacitance must be repeatedly charged or discharged. The internal
resistance of the reference source must allow the capacitance to reach their final voltage level within the
indicated time. The maximum internal resistance results from the programmed conversion timing.
6) Not 100% tested, but guaranteed by design characterization.
Internal resistance of
analog source
RASRC
–
tS / 500
- 0.25
k
tS in [ns]
ADC input capacitance
CAIN
–50
pF
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