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| 型號： | SAF-C515C-8EMCA |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, MQFP-80 |
| 文件頁數(shù)： | 32/97頁 |
| 文件大小： | 1298K |
| 代理商： | SAF-C515C-8EMCA |
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C515C
Data Sheet
34
2003-02
Timer / Counter 0 and 1
Timer / Counter 0 and 1 can be used in four operating modes as listed in Table 7:
In the “timer” function (C/T = ‘0’) the register is incremented every machine cycle.
Therefore the count rate is
fOSC/6.
In the “counter” function the register is incremented in response to a 1-to-0 transition at
its corresponding external input pin (P3.4/T0, P3.5/T1). Since it takes two machine
cycles to detect a falling edge the max. count rate is
fOSC/12. External inputs INT0 and
INT1
(P3.2, P3.3) can be programmed to function as a gate to facilitate pulse width
measurements. Figure 11 illustrates the input clock logic.
Figure 11
Timer/Counter 0 and 1 Input Clock Logic
Table 7
Timer/Counter 0 and 1 Operating Modes
Mode
Description
TMOD
Timer/Counter Input Clock
M1
M0
internal
external (max)
0
8-bit timer/counter with a
divide-by-32 prescaler
00
fOSC/6 × 32
fOSC/12 × 32
1
16-bit timer/counter
0
1
fOSC/6
fOSC/12
2
8-bit timer/counter with 8-bit
autoreload
10
3
Timer/counter 0 used as
one 8-bit timer/counter and
one 8-bit timer / Timer 1
stops
11
MCS03117
1
&
OSC
C/T = 0
C/T = 1
Control
=1
6
TR1
P3.5/T1
(TMOD)
P3.2/INT0
f
Timer 0/1
Input Clock
OSC/6
P3.4/T0
TR0
Gate
P3.3/INT1
÷
_
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