參數(shù)資料
型號: SAF-C515C-8EMCA
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, MQFP-80
文件頁數(shù): 17/97頁
文件大?。?/td> 1298K
代理商: SAF-C515C-8EMCA
C515C
Data Sheet
20
2003-02
Reset and System Clock
The reset input is an active low input at pin RESET. Since the reset is synchronized
internally, the RESET pin must be held low for at least two machine cycles (12 oscillator
periods) while the oscillator is running. A pullup resistor is internally connected to
VDD to
allow a power-up reset with an external capacitor only. An automatic reset can be
obtained when
VDD is applied by connecting the RESET pin to VSS via a capacitor.
Figure 6 shows the possible reset circuitries.
Figure 6
Reset Circuitries
Figure 7 shows the recommended oscillator circiutries for crystal and external clock
operation.
MCS02721
RESET
C515C
b)
a)
c)
+
&
RESET
C515C
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