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參數(shù)資料
| 型號： | SAE81C91 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 24/41頁 |
| 文件大?。?/td> | 521K |
| 代理商： | SAE81C91 |
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07Feb95@09:05h Intermediate Version
Semiconductor Group
29
SAE 81C90/91
Time Stamp Register Table
Transmit Check Error Counter
Note: Not defined bit positions must be ’0’ for write accesses.
Transmit Check Data Register
This register supports an error analysis when a transmit check error is encountered. Reading TCD
provides the byte which was actually being sent when the error occurred.
Address
Function
30H
High Byte
Time-Stamp 0
31H
Low Byte
32H
High Byte
Time-Stamp 1
33H
Low Byte
::
:
3CH
High Byte
Time-Stamp 6
3DH
Low Byte
3EH
High Byte
Time-Stamp 7
3FH
Low Byte
TCEC
76543210
Address: 15H
-----
TCECV
Reset Value: 00H
-----
rw
Bit(field)
Function
TCECV
Transmit Check Error Counter Value
Number of errors detected by the transmit check unit.
When a count of 4 is reached an interrupt is generated if enabled.
If bit TCE (CTRL.1) is set to ’1’ the Bus Off status is entered in this case.
TCD
76543210
Address: 16H
Data Byte
Reset Value: XXH
rrrrrrrr
Bit(field)
Function
Data Byte
The data byte which was attempted to be sent while a transmit check error was
encountered.
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