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參數(shù)資料
| 型號： | SAE81C91 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 22/41頁 |
| 文件大小： | 521K |
| 代理商： | SAE81C91 |
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07Feb95@09:05h Intermediate Version
Semiconductor Group
28
SAE 81C90/91
Message Time Stamp
This mechanism stores the time at which a specific message was received, i.e. it assigns a time
stamp to that message. For this purpose the contents of the free-running time stamp counter TSC
is copied to the time stamp register TSRn of the respective message object upon reception of this
message.
The Time Stamp Counter Registers provide access to the free-running time stamp counter.
The Time-Stamp Registers are available for each of message objects 0...7 (see table below) and
contain the time-stamp of the corresponding message. These registers can only be read.
n = 0...7
TSCH
76543210
Address: 1CH
TSC.15 TSC.14 TSC.13 TSC.12 TSC.11 TSC.10
TSC.9
TSC.8
Reset Value: 00H
rw
TSCL
76543210
Address: 1DH
TSC.7
TSC.6
TSC.5
TSC.4
TSC.3
TSC.2
TSC.1
TSC.0
Reset Value: 00H
rw
Bit(field)
Function
TSC
Time Stamp Counter
Current contents of the free running time stamp counter.
TSRnH
76543210
Address: 3XH
TSn.15
TSn.14
TSn.13
TSn.12
TSn.11
TSn.10
TSn.9
TSn.8
Reset Value: UUH
rrrrrrrr
TSRnL
76543210
Address: 3XH
TSn.7
TSn.6
TSn.5
TSn.4
TSn.3
TSn.2
TSn.1
TSn.0
Reset Value: UUH
rrrrrrrr
Bit(field)
Function
TSn
Time Stamp n
A 16-bit timer value to identify the time of reception of message n.
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