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參數(shù)資料
| 型號(hào)： | SAB-C163-16F25F |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | METRIC, PLASTIC, TQFP-100 |
| 文件頁數(shù)： | 65/66頁 |
| 文件大?。?/td> | 669K |
| 代理商： | SAB-C163-16F25F |
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1997 Intermediate Version
Semiconductor Group
8
1997-10-01
C163-16F
PORT0:
P0L.0 –
P0L.7,
P0H.0 -
P0H.7
41 –
48
51 –
58
I/O
PORT0 consists of the two 8-bit bidirectional I/O ports P0L
and P0H. It is bit-wise programmable for input or output via
direction bits. For a pin configured as input, the output driver is
put into high-impedance state.
In case of an external bus configuration, PORT0 serves as the
address (A) and address/data (AD) bus in multiplexed bus
modes and as the data (D) bus in demultiplexed bus modes.
Demultiplexed bus modes:
Data Path Width:
8-bit
16-bit
P0L.0 – P0L.7:
D0 – D7
D0 - D7
P0H.0 – P0H.7:
I/O
D8 - D15
Multiplexed bus modes:
Data Path Width:
8-bit
16-bit
P0L.0 – P0L.7:
AD0 – AD7
AD0 - AD7
P0H.0 – P0H.7:
A8 - A15
AD8 - AD15
PORT1:
P1L.0 –
P1L.7,
P1H.0 -
P1H.7
59 -
66
67 - 68,
71 - 76
I/O
PORT1 consists of the two 8-bit bidirectional I/O ports P1L
and P1H. It is bit-wise programmable for input or output via
direction bits. For a pin configured as input, the output driver is
put into high-impedance state. PORT1 is used as the 16-bit
address bus (A) in demultiplexed bus modes and also after
switching from a demultiplexed bus mode to a multiplexed bus
mode.
RSTIN
79
I
Reset Input with Schmitt-Trigger characteristics. A low level at
this pin for a specified duration while the oscillator is running
resets the C163-16F. An internal pullup resistor permits
power-on reset using only a capacitor connected to
V
SS.
RSTOUT 80
O
Internal Reset Indication Output. This pin is set to a low level
when the part is executing either a hardware-, a software- or a
watchdog timer reset. RSTOUT remains low until the EINIT
(end of initialization) instruction is executed.
NMI
81
I
Non-Maskable Interrupt Input. A high to low transition at this
pin causes the CPU to vector to the NMI trap routine. When
the PWRDN (power down) instruction is executed, the NMI pin
must be low in order to force the C163-16F to go into power
down mode. If NMI is high, when PWRDN is executed, the
part will continue to run in normal mode.
If not used, pin NMI should be pulled high externally.
Pin Definitions and Functions (cont’d)
Symbol
Pin
Number
Input (I)
Output (O)
Function
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAB-C165-L25F | 16-BIT, 14 MHz, MICROCONTROLLER, PQFP100 |
| SAB-C165-R25M | 16-BIT, MROM, 14 MHz, MICROCONTROLLER, PQFP100 |
| SAB-C502-LN | 8-BIT, 12 MHz, MICROCONTROLLER, PQCC44 |
| SAB-C502-LP | 8-BIT, 12 MHz, MICROCONTROLLER, PDIP40 |
| SAF-C502-LP | 8-BIT, 12 MHz, MICROCONTROLLER, PDIP40 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SABC16324D33F | 制造商:INFINEON 功能描述:New |
| SABC163L25F | 制造商:Infineon Technologies AG 功能描述:MCU 16-bit C166 CISC/RISC ROMLess 5V 100-Pin TQFP |
| SAB-C163-L25F | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SABC163-L25FTR | 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit C166 CISC/RISC ROMLess 5V 100-Pin TQFP T/R |
| SABC163LF | 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit C166 CISC/RISC ROMLess 5V 100-Pin TQFP |
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