參數(shù)資料
型號(hào): SAB-C163-16F25F
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP100
封裝: METRIC, PLASTIC, TQFP-100
文件頁數(shù): 16/66頁
文件大?。?/td> 669K
代理商: SAB-C163-16F25F
1997 Intermediate Version
Semiconductor Group
23
1997-10-01
C163-16F
In standard mode (the normal operating mode) the Flash memory appears like the standard on-chip
ROM of C167 devices with the same timing and functionality. Instruction fetches and data operand
reads are performed with all addressing modes of the C16x instruction set.
Programming and erasing is controlled via special command sequences. This avoids inadvertent
destruction of the Flash contents at a reasonably low software overhead. Command sequences
consist of subsequent write (or read) accesses to virtual locations within the Flash space. These
virtual locations are defined by special addresses (see command sequence table) and require
register-indirect addressing.
Flash Memory Configuration
Upon reset the default memory configuration of the C163-16F is determined by the state of its EA
pin. When EA is high the startup code is fetched from the on-chip Flash memory, when EA is low the
internal Flash is disabled and the startup code is fetched from external memory.
In order to access the on-chip Flash memory after booting from external memory the internal Flash
must be enabled via software by setting bit ROMEN in register SYSCON. The lower 32 KBytes of
the Flash memory can be mapped to segment 0 or to segment 1, controlled by bit ROMS1 in
register SYSCON. Mapping to segment 1 preserves the external memory containing the startup
code, while mapping to segment 0 replaces the lower 32 KBytes of the external memory with on-
chip Flash memory. In this case a valid vector table must be provided in the Flash memory. As the
on-chip Flash memory covers more than segment 0 segmentation should be enabled (by clearing
bit SGTDIS in register SYSCON) in order to ensure correct stack handling when branching to the
upper segments.
Whenever the internal memory configuration of the C163-16F is changed (enable, disable,
mapping) the following procedure must be used to ensure correct operation:
q
Configure the internal Flash as required
q
Execute an inter-segment branch (JMPS, CALLS, RETS)
q
Reload all four DPP registers
Note: Instructions that configure the internal Flash may only be executed from internal RAM or from
external memory, not from the Flash itself.
Register SYSCON can only be modified before the execution of the EINIT instruction.
Boot Support
The C163-16F’s boot support provides a mechanism to load the startup code and/or the Flash
programming routines from a remote code source e.g. via a serial interface without requiring
additional external memory. This allows for firmware updates of the Flash memory for program and/
or data values. When the boot support is enabled (by configuring pin P0L.4 low during reset) the
C163-16F will start code execution at location 02’0000H rather than at location 00’0000H.
Note: The boot support mechanism is not supported by the A-step devices.
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