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參數(shù)資料
| 型號： | SAA7705H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Car radio Digital Signal Processor（DSP）(車載電臺數(shù)字信號處理器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 文件頁數(shù)： | 22/60頁 |
| 文件大小： | 1857K |
| 代理商： | SAA7705H |
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1999 Aug 16
22
Philips Semiconductors
Preliminary specification
Car radio Digital Signal Processor (DSP)
SAA7705H
8.10
RDS decoder (pins RDSCLK and RDSDAT)
The RDS decoder recovers the additional inaudible RDS
information which is transmitted by FM radio broadcasting.
The (buffered) data is provided as output for further
processing by a suitable decoder. The operational
functions of the decoder are in accordance with the
“European Broadcasting Union (EBU) specification
EN 50067”
The RDS decoder has three different functions:
Clock and data recovery from the FM multiplex signal
Buffering of 16 bits, if selected
Interfacing with the microcontroller.
8.10.1
C
LOCK AND DATA RECOVERY
The RDS chain has a separate input. This enables RDS
updates during tape play and also the use of a second
receiverformonitoringtheRDSinformationofsignalsfrom
another transmitter (double tuner concept). It can as such
be done without interruption of the audio program.
The MPX signal from the main tuner of the car radio can
be connected to this RDS input via the built-in source
selector. The input selection is controlled by
bit RDS-CLKIN of the RDSCTR register (see Table 14).
The RDS chain contains a third-order Sigma-Delta ADC,
followedbytwodecimationfilters.Thefirstfilterpassesthe
multiplex band including the signals around 57 kHz and
reduces the Sigma-Delta noise.
The second filter reduces the RDS bandwidth around
57 kHz.
The quadrature mixer converts the RDS band to the
frequency spectrum around 0 Hz and contains the
appropriate Q/I signal filters. The final decoder with
CORDIC recovers the clock and data signals.
These signals are output on pins RDSCLK and RDSDAT.
8.10.2
T
IMING OF CLOCK AND DATA SIGNALS
The timing of the clock and data output is derived from the
incoming data signal. Under stable conditions the data will
remain valid for 400
μ
s after the clock transition.
The timing of the data change is 100
μ
s before a positive
clock change. This timing is suited for positive as well as
negative triggered interrupts on a microcontroller.
The RDS timing is shown in Fig.10.
During poor reception it is possible that faults in phase
occur, then the duty cycle of the clock and data signals will
vary from minimum 0.5 times to a maximum of 1.5 times
the standard clock periods. Normally, faults in phase do
not occur on a cyclic basis.
8.10.3
B
UFFERING OF
RDS
DATA
The repetition of the RDS data is around the 1187 Hz.
This results in an interrupt on the microcontroller for every
842
μ
s. In a second mode, the RDS interface has a double
16-bit buffer.
Fig.10 RDS timing (direct output mode).
handbook, full pagewidth
MBH175
RDSDAT
RDSCLK
ts
tHC
tLC
td
Tcy
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7706H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Car radio Digital Signal Processor (DSP) |
| SAA7706H/N107 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DIGITAL SIGNAL PROCESSOR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SAA7706H/N107,518 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DIRAC-1 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SAA7706H/N107,557 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DIGITAL SIGNAL RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SAA7706H/N107S,518 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC CAR RADIO DIGITAL SIGNAL PROCESSOR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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