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參數(shù)資料
| 型號： | SAA7705H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Car radio Digital Signal Processor（DSP）(車載電臺數(shù)字信號處理器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 文件頁數(shù)： | 17/60頁 |
| 文件大?。?/td> | 1857K |
| 代理商： | SAA7705H |
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1999 Aug 16
17
Philips Semiconductors
Preliminary specification
Car radio Digital Signal Processor (DSP)
SAA7705H
Fig.6 Block diagram of the oscillator circuit.
handbook, full pagewidth
MGM126
AGC
Gm
Rbias
Cx2
Cx1
clock to circuit
on-chip
off-chip
OSCIN
OSCOUT
63
64
VDD(OSC)
VSS(OSC)
65
62
Although multiples of the crystal frequency of
11.2896 MHzfallwithintheFMreceptionband,thiswillnot
disturb the reception. The relatively low frequency crystal
is driven in a controlled way and the resonating crystal
produces harmonics of a very low amplitude in the FM
reception band.
The block diagram of the programmable PLL is shown in
Fig.7. The oscillator is used in a fundamental mode.
The 11.2896 MHz oscillator frequency is divided by 256
and the resulting signal is fed to the phase detector as a
reference signal. The base for the clock signal is a current
controlled oscillator (free running frequency
70 to 130 MHz).
After having been divided by 4, the required clock
frequency for the DSP core is available. To close the loop
this signal is further divided by 4 and by the PLL clock
division factor N. N can be programmed with the DCSCTR
register bits PLL-DIV (see Tables 7 and 15) in the range
from 93 to 181. This provides some flexibility in the choice
of the crystal frequency.
With the recommended crystal, N = 154 and the DSP
clockfrequency(f
DSP
)equals27.1656 MHz.N = 154isthe
default position at start-up. By setting the AD register bit
DSPTURBO (see Tables 9 and 15), the PLL output
frequency, and consequently f
DSP
, can be doubled.
This feature is not used in the proposed application.
The clock frequency of the PLL oscillator divided by two
(2f
DSP
) is also used as the clock for the DCS block.
8.4.3
T
HE CLOCK BLOCK
For the digital stereo decoder a clock signal is needed
which is the 512-multiple of the pilot tone frequency of the
FMmultiplexsignal.ThisisdonebytheDigitallyControlled
Sampling (DCS) block, which generates this
512
×
19 kHz = 9.728 MHz clock, the DCS clock, by
locking to the pilot frequency. This block is also able to
generate other frequencies. It is controlled by the
DCSCTR and DCSDIV registers (see Tables 7 and 8).
Default settings of the DCS and the PLL guarantee correct
functioning of the DCS block.
8.4.4
S
YNCHRONIZATION WITH THE CORE
In case of I
2
S-bus input the system can run on audio
sample frequencies of f
s
= 32 kHz, 38 kHz, 44.1 kHz
or 48 kHz. After processing of an input sample, the Input
flag (I-flag) of the status register (see Section 8.7) of the
DSP core is set to logic 1 during 4 clock cycles on the
falling edge of the internal or external I
2
S-bus WS pulses.
This flag can be tested with a conditional branch
instruction in the DSP. This synchronisation starts in
parallelwiththeinputsignalduetotheshortperiodthatthe
I-flag is set. It is obvious that the higher f
s
the lower the
number of cycles available in the DSP program.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7706H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Car radio Digital Signal Processor (DSP) |
| SAA7706H/N107 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DIGITAL SIGNAL PROCESSOR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SAA7706H/N107,518 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DIRAC-1 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SAA7706H/N107,557 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DIGITAL SIGNAL RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
| SAA7706H/N107S,518 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC CAR RADIO DIGITAL SIGNAL PROCESSOR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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