參數(shù)資料
型號(hào)： SAA7184
廠商： NXP Semiconductors N.V.
英文描述： Digital Video Encoders DENC2-M6
中文描述： 數(shù)字視頻編碼器DENC2 - M6的
文件頁數(shù)： 19/36頁
文件大?。?/td> 180K
代理商： SAA7184
1996 Jul 03
19
Philips Semiconductors
Preliminary specification
Digital Video Encoders (DENC2-M6)
SAA7184; SAA7185B
Table 21
Subaddress 6C
Table 22
Logic levels and function of SRCV1
Table 23
Subaddress 6D
DATA BYTE
LOGIC LEVEL
DESCRIPTION
PRCV2
0
polarity of RCV2 as output is active HIGH, rising edge is taken when input,
respectively. Default after reset
polarity of RCV2 as output is active LOW, falling edge is taken when input,
respectively
pin RCV2 is switched to input. Default after reset
pin RCV2 is switched to output
if ORCV2 = HIGH, pin RCV2 provides an HREF signal (Horizontal Reference Pulse
that is defined by RCV2S and RCV2E, also during vertical blanking Interval). Default
after reset
1
ORCV2
0
1
0
CBLF
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization only
(if TRCV2 = 1). Default after reset
if ORCV2 = HIGH, pin RCV2 provides a ‘composite blanking not’ signal i.e. a
reference pulse that is defined by RCV2S and RCV2E, excluding vertical blanking
Interval, which is defined by FAL and LAL (PRCV2 must be LOW)
1
if ORCV2 = LOW, signal input to RCV2 is used for horizontal synchronization
(if TRCV2 = 1) and as an internal blanking signal
polarity of RCV1 as output is active HIGH, rising edge is taken when input,
respectively. Default after reset
polarity of RCV1 as output is active LOW, falling edge is taken when input,
respectively
pin RCV1 is switched to input. Default after reset
pin RCV1 is switched to output
horizontal synchronization is taken from RCV1 port. Default after reset
horizontal synchronization is taken from RCV2 port
defines signal type on pin RCV1; see Table 22
PRCV1
0
1
ORCV1
0
1
0
1
TRCV2
SRCV1
DATA BYTE
AS OUTPUT
AS INPUT
FUNCTION
SRCV11
SRCV10
0
0
1
0
1
0
VS
FS
VS
FS
vertical sync each field. Default after reset
frame sync (odd/even)
field sequence, vertical sync every fourth field
(PAL = 0) or eighth field (PAL = 1)
FSEQ
FSEQ
1
1
not applicable
not applicable
DATA BYTE
DESCRIPTION
CCEN
SRCM
enables individual line 21 encoding; see Table 24
defines signal type on pin RCM1; see Table 25
相關(guān)PDF資料
PDF描述
SAA7187 Digital video encoder (DENC2-SQ)(數(shù)字視頻編碼器)
SAA7188A Digital Video Encoder (DENC2-M)(數(shù)字視頻編碼器(DENC2-M))
SAA7201 Integrated MPEG2 AVG Decoder(綜合MPEG音頻視頻圖表譯碼器)
SAA7201H Integrated MPEG2 AVG decoder
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA7184WP 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoders DENC2-M6
SAA7185 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoder DENC2
SAA7185B 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoders DENC2-M6
SAA7185BWP 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoders DENC2-M6
SAA7185WP 制造商:NXP Semiconductors 功能描述: 制造商:Philips Semiconductor 功能描述:
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