參數(shù)資料
型號(hào)： S29AL032D90TFI043
廠商： SPANSION LLC
元件分類： PROM
英文描述： 32 Megabit CMOS 3.0 Volt-only Flash Memory
中文描述： 2M X 16 FLASH 3V PROM, 90 ns, PDSO48
封裝： LEAD FREE, MO-142DD, TSOP-48
文件頁(yè)數(shù)： 33/67頁(yè)
文件大?。?/td> 1708K
代理商： S29AL032D90TFI043
November 2, 2006 S29AL032D_00_A8
S29AL032D
37
Data
She e t
11.10 Command Definitions Table
Legend
Notes
Table 11.1 S29AL032D Command Definitions — Model 00
Command Sequence
Cyc
les
Bus Cycles (Notes 2–3)
First
Second
Third
Fourth
Fifth
Sixth
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
1RA
RD
Reset (Note 7)
1XXX
F0
A
u
toselect
Manufacturer ID (Note 7)
4
XXX
AA
XXX
55
0XXXXX
90
0XXX00
01
Device ID (Note 7)
4
XXX
AA
XXX
55
0XXXXX
90
0XXX01
A3
Secured Silicon Sector Factory
Protect (Note 14)
4
AAA
AA
555
55
AAA
90
X06
85/05
Sector Protect Verify
4
XXX
AA
XXX
55
0XXXXX
or
2XXXXX
90
SA
X02
00
XXX
01
Enter Secured Silicon Sector Region
3
XXX
AA
XXX
55
XXX
88
XXX
Exit Secured Silicon Sector Region
4
XXX
AA
XXX
55
XXX
90
XXX
00
Byte Program
4
XXX
AA
XXX
55
XXX
A0
PA
PD
Unlock Bypass
3
XXX
AA
XXX
55
XXX
20
Unlock Bypass Program
2
XXX
A0
PA
PD
Unlock Bypass Reset
2
XXX
90
XXX
00
Chip Erase
6
XXX
AA
XXX
55
XXX
80
XXX
AA
XXX
55
XXX
10
Sector Erase
6
XXX
AA
XXX
55
XXX
80
XXX
AA
XXX
55
SA
30
Erase Suspend (Note 11)
1
XXX
B0
Erase Resume (Note 12)
1XXX
30
CFI Query (Note 13)
1XXX
98
X = Don’t care
RA = Address of the memory location to be read
RD = Data read from location RA during read operation
PA = Address of the memory location to be programmed. Addresses are latched
on the falling edge of the WE# or CE# pulse, whichever happens later.
PD = Data to be programmed at location PA. Data is latched on the rising edge
of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be erased or verified. Address bits A21–A16
uniquely select any sector.
1. See Table 7.1 on page 12 for descriptions of bus operations.
2. All values are in hexadecimal. Except when reading array or autoselect data,
all bus cycles are write operations.
3. Address bits are don’t care for unlock and command cycles, except when PA
or SA is required.
4. No unlock or command cycles required when device is in read mode.
5. The Reset command is required to return to the read mode when the device
is in the autoselect mode or if DQ5 goes high.
6. The fourth cycle of the autoselect command sequence is a read cycle.
7. In the third and fourth cycles of the command sequence, set A21 to 0.
8. In the third cycle of the command sequence, address bit A21 must be set to
0 if verifying sectors 0–31, or to 1 if verifying sectors 32–64. The data in the
fourth cycle is 00h for an unprotected sector/sector block and 01h for a
protected sector/sector block.
9. The Unlock Bypass command is required prior to the Unlock Bypass
Program command.
10. The Unlock Bypass Reset command is required to return to reading array
data when the device is in the Unlock Bypass mode.
11. The system may read and program functions in non-erasing sectors, or enter
the autoselect mode, when in the Erase Suspend mode. The Erase Suspend
command is valid only during a sector erase operation.
12. The Erase Resume command is valid only during the Erase Suspend mode.
13. Command is valid when device is ready to read array data or when device is
in autoselect mode.
14. The data is 85h for factory locked and 05h for not factory locked.
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