參數(shù)資料
型號(hào): S25FL064A0LNAI00
廠商: SPANSION LLC
元件分類: PROM
英文描述: 64M X 1 FLASH 3V PROM, PDSO16
封裝: 0.300 INCH, PLASTIC, MS-013AA, SOP-16
文件頁(yè)數(shù): 21/36頁(yè)
文件大小: 1495K
代理商: S25FL064A0LNAI00
June 29, 2007 S25FL064A_00_C3
S25FL064A
29
Data
She e t
10. Power-up and Power-down
During power-up and power-down, certain conditions must be observed. CS# must follow the voltage applied
on VCC, and must not be driven low to select the device until VCC reaches the allowable values as follows
At power-up, VCC (min) plus a period of tPU
At power-down, VSS
A pull-up resistor on Chip Select (CS#) typically meets proper power-up and power-down requirements.
No Write Status Register, program, or erase command should be sent to the device until VCC rises to the VCC
min, plus a delay of tPU. At power-up, the device is in standby mode (not Deep Power Down mode) and the
WEL bit is reset (0).
Each device in the host system should have the VCC rail decoupled by a suitable capacitor close to the
package pins (this capacitor is generally of the order of 0.1 F), as a precaution to stabilizing the VCC feed.
When VCC drops from the operating voltage to below the minimum VCC threshold at power-down, all
operations are disabled and the device does not respond to any commands. Note that data corruption may
result if a power-down occurs while a Write Register, program, or erase operation is in progress.
Figure 10.1 Power-Up Timing Diagram
11. Initial Delivery State
The device is delivered with all bits set to 1 (each byte contains FFh) upon initial factory shipment. The Status
Register contains 00h (all Status Register bits are 0).
Table 10.1 Power-Up Timing Characteristics
Symbol
Parameter
Min
Max
Unit
VCC(min)
VCC (minimum)
2.7
V
tPU
VCC (min) to device operation
10
ms
Vcc
(max)
Vcc
(min)
Full Device Access
tPU
Time
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