參數(shù)資料
型號(hào): S1D13305F00B
元件分類: 顯示控制器
英文描述: 640 X 256 PIXELS CRT CHAR OR GRPH DSPL CTLR, PQFP60
封裝: QFP6-60
文件頁(yè)數(shù): 63/94頁(yè)
文件大?。?/td> 541K
代理商: S1D13305F00B
60
EPSON
S1D13305 Series
Technical Manual
Figure 47. Display memory write cycle
Figure 48. Display memory read cycle
Note
A possible problem with the display memory read cycle is that the system bus access time,
tACC, does not
depend on the display memory access time,
tACV. The microprocessor may only make repeated reads if the
read loop time exceeds the S1D13305 series cycle time,
tCYC. If it does not, NOP instructions may be inserted
in the program loop.
tACC, tACV and tCYC limits are given in section 6.2.
WR
D0 to D7
VR/W
VD0 to VD7
tCYC
Command write
Data write
Microprocessor
Display memory
VRW
tCYC
Command write
Data read
WR
RD
D0 to D7
VR/W
VD0 to VD7
Microprocessor
Display memory
VRW
MICROPROCESSOR INTERFACE
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