參數(shù)資料
型號: S1C88832F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP128
封裝: PLASTIC, QFP-128
文件頁數(shù): 81/160頁
文件大?。?/td> 1244K
代理商: S1C88832F0A0100
S1C88832/88862 TECHNICAL MANUAL
EPSON
19
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Memory Map)
Table 5.1.1(b) I/O Memory map (00FF11H–00FF22H)
Address Bit
Name
SR R/W
Function
Comment
10
00FF11 D7
D6
D5
D4
D3
D2
D1
D0
DSPAR
LCDC1
LCDC0
LC3
LC2
LC1
LC0
LCD display memory area selection
LCD display control
LCD contrast adjustment
"0" when being read
These bits are reset
to (0, 0) when
SLP instruction
is executed.
0
R/W
Display area 1
Display area 0
LCDC1
1
0
LCDC0
1
0
1
0
LCD display
All LCDs lit
All LCDs out
Normal display
Drive off
LC3
1
:
0
LC2
1
:
0
LC1
1
:
0
LC0
1
0
:
0
Contrast
Dark
:
Light
00FF12 D7
D6
D5
D4
D3
D2
D1
D0
SVDSP
SVDON
SVD3
SVD2
SVD1
SVD0
SVD auto-sampling control
SVD continuous sampling control/status
SVD detection level
Constantry "0" when
being read
These registers are
reset to "0" when
SLP instruction
is executed.
*2
0
1
0*1
0
X
R/W
R
On
Busy
On
Off
Ready
Off
R
W
SVD3
1
:
0
SVD2
1
:
0
SVD1
1
:
0
SVD0
1
0
:
0
Detection level
Level 15
Level 14
:
Level 0
*1 After initial reset, this status is set "1" until conclusion of hardware first sampling.
*2 Initial values are set according to the supply voltage detected at first sampling by hardware.
Until conclusion of first sampling, SVD0–SVD3 data are undefined.
00FF20 D7
D6
D5
D4
D3
D2
D1
D0
PK01
PK00
PSIF1
PSIF0
PSW1
PSW0
PTM1
PTM0
K00–K07 interrupt priority register
Serial interface interrupt priority register
Stopwatch timer interrupt priority register
Clock timer interrupt priority register
0
R/W
PK01
PSIF1
PSW1
PTM1
1
0
PK00
PSIF0
PSW0
PTM0
1
0
1
0
Priority
level
Level 3
Level 2
Level 1
Level 0
00FF21 D7
D6
D5
D4
D3
D2
D1
D0
PPT1
PPT0
PK11
PK10
Programmable timer interrupt priority register
K10 interrupt priority register
Constantly "0" when
being read
0
R/W
PPT1
PK11
1
0
PPT0
PK10
1
0
1
0
Priority
level
Level 3
Level 2
Level 1
Level 0
00FF22 D7
D6
D5
D4
D3
D2
D1
D0
ESW100
ESW10
ESW1
ETM32
ETM8
ETM2
ETM1
Stopwatch timer 100 Hz interrupt enable register
Stopwatch timer 10 Hz interrupt enable register
Stopwatch timer 1 Hz interrupt enable register
Clock timer 32 Hz interrupt enable register
Clock timer 8 Hz interrupt enable register
Clock timer 2 Hz interrupt enable register
Clock timer 1 Hz interrupt enable register
"0" when being read
0
R/W
Interrupt
enable
Interrupt
disable
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