參數(shù)資料
型號(hào): S1C88832F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP128
封裝: PLASTIC, QFP-128
文件頁(yè)數(shù): 111/160頁(yè)
文件大?。?/td> 1244K
代理商: S1C88832F0A0100
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46
EPSON
S1C88832/88862 TECHNICAL MANUAL
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (I/O Ports)
5.6 I/O Ports (P ports)
5.6.1 Configuration of I/O ports
The S1C88832/88862 is equipped with 8 bits of I/O
ports (P10–P17).
Figure 5.6.1.1 shows the structure of an I/O port.
Fig. 5.6.1.1 Structure of I/O port
I/O port can be set for input or output mode in one
bit unit. These settings are performed by writing
data to the I/O control registers.
I/O port terminals P10–P13 are shared with serial
interface input/output terminals. The function of
the terminals is switchable in software. With
respect to the serial interface, see "5.7 Serial Inter-
face".
The data registers and I/O control registers of the
I/O ports set as serial interface outputs are usable
as general purpose registers with read/write
capabilities which do not affect I/O activities of the
terminal.
The same as above, I/O control registers of the I/O
ports set as serial interface inputs are usable as
general purpose register.
5.6.2 Mask option
I/O port pull-up resistors
P10 ............ s
s With resistor
s
s Gate direct
P11 ............ s
s With resistor
s
s Gate direct
P12 ............ s
s With resistor
s
s Gate direct
P13 ............ s
s With resistor
s
s Gate direct
P14 ............ s
s With resistor
s
s Gate direct
P15 ............ s
s With resistor
s
s Gate direct
P16 ............ s
s With resistor
s
s Gate direct
P17 ............ s
s With resistor
s
s Gate direct
Input
control
VDD
VSS
Data
bus
Pxx
Data
register
I/O control
register
Mask
option
*1
*2
*1: During output mode
*2: During input mode
I/O ports P10–P17 are equipped with a pull-up
resistor which goes ON in the input mode. Whether
this resistor is used or not can be selected for each
port (one bit unit).
In cases where the 'With resistor' option is selected,
the pull-up resistor goes ON when the port is in
input mode.
When changing the port terminal from LOW level
to HIGH with the built-in pull-up resistor, a delay
in the waveform rise time will occur depending on
the time constant of the pull-up resistor and the
load capacitance of the terminal. It is necessary to
set an appropriate wait time for introduction of an
I/O port. Make this wait time the amount of time
or more calculated by the following expression.
Wait time = RIN x (CIN + load capacitance on the
board) x 1.6 [sec]
RIN: Pull up resistance Max. value
CIN: Terminal capacitance Max. value
For unused I/O ports, select the default setting of
"With resistor".
5.6.3 I/O control registers and I/O mode
I/O ports P10–P17 are set either to input or output
modes by writing data to the I/O control registers
IOC10–IOC17 which correspond to each bit.
To set an I/O port to input mode, write "0" to the I/O
control register.
An I/O port which is set to input mode will shift to a
high impedance state and functions as an input port.
Readout in input mode consists simply of a direct
readout of the input terminal state: the data being "1"
when the input terminal is at HIGH (VDD) level and
"0" when it is at LOW (VSS) level.
When the "With resistor" option is selected using
the mask option, the resistor is pulled up onto the
port terminal in input mode.
Even in input mode, data can be written to the data
registers without affecting the terminal state.
To set an I/O port to output mode, write "1" to the
I/O control register. An I/O port which is set to
output mode functions as an output port.
When port output data is "1", a HIGH (VDD) level is
output and when it is "0", a LOW (VSS) level is
output. Readout in output mode consists of the
contents of the data register.
At initial reset, I/O control registers are set to "0"
(I/O ports are set to input mode).
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