
7 DETAILS OF INSTRUCTIONS
S1C17 FAMILY S1C17 CORE MANUAL
EPSON
7-63
ld.a %rd, [%sp]
ld.a %rd, [%sp]+
ld.a %rd, [%sp]-
ld.a %rd, -[%sp]
Function
32-bit data transfer
ld.a %rd, [%sp]
Standard)
rd
(23:0)
← A[sp](23:0), ignored ← A[sp](31:24)
Extension 1) rd(23:0)
← A[sp + imm13](23:0), ignored ← A[sp + imm13](31:24)
Extension 2) rd(23:0)
← A[sp + imm24](23:0), ignored ← A[sp + imm24](31:24)
ld.a %rd, [%sp]+ (with post-increment option)
Standard)
rd
(23:0)
← A[sp](23:0), ignored ← A[sp](31:24), sp(23:0) ← sp(23:0) + 4
Extension 1) rd(23:0)
← A[sp + imm13](23:0), ignored ← A[sp + imm13](31:24),
sp(23:0)
← sp(23:0) + imm13
Extension 2) rd(23:0)
← A[sp + imm24](23:0), ignored ← A[sp + imm24](31:24),
sp(23:0)
← sp(23:0) + imm24
ld.a %rd, [%sp]- (with post-decrement option)
Standard)
rd
(23:0)
← A[sp](23:0), ignored ← A[sp](31:24), sp(23:0) ← sp(23:0) - 4
Extension 1) rd(23:0)
← A[sp + imm13](23:0), ignored ← A[sp + imm13](31:24),
sp(23:0)
← sp(23:0) - imm13
Extension 2) rd(23:0)
← A[sp + imm24](23:0), ignored ← A[sp + imm24](31:24),
sp(23:0)
← sp(23:0) - imm24
ld.a %rd, -[%sp] (with pre-decrement option)
Standard)
sp(23:0)
← sp(23:0) - 4, rd(23:0) ← A[sp](23:0), ignored ← A[sp](31:24)
Extension 1) sp(23:0)
← sp(23:0) - imm13, rd(23:0) ← A[sp + imm13](23:0),
ignored
← A[sp + imm13](31:24)
Extension 2) sp(23:0)
← sp(23:0) - imm24, rd(23:0) ← A[sp + imm24](23:0),
ignored
← A[sp + imm24](31:24)
Code
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
0 0 1 1 1 1
r d
0 0 1 1 0 0 0
ld.a
%rd,[%sp]
|
0 0 1 1 1 1
r d
0 1 1 1 0 0 0
ld.a
%rd,[%sp]+
|
0 0 1 1 1 1
r d
1 1 1 1 0 0 0
ld.a
%rd,[%sp]-
|
0 0 1 1 1 1
r d
1 0 1 1 0 0 0
ld.a
%rd,-[%sp]
|
Flag
IL IE
C
V
Z
N
– – – – – –
|
Mode
Src:Register indirect %sp
Dst:Register direct %rd = %r0 to %r7
CLK
One cycle (two cycles when the ext instruction or an increment/decrement option is used)
Description (1) Standard
ld.a
%rd,[%sp]
; memory address = sp
The 32-bit data (the eight high-order bits are ignored) in the specified memory location is
transferred to the rd register. The SP contains the memory address to be accessed.