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參數(shù)資料
| 型號： | S1C63455F |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP128 |
| 封裝： | PLASTIC, QFP5-128 |
| 文件頁數(shù)： | 9/119頁 |
| 文件大?。?/td> | 865K |
| 代理商： | S1C63455F |
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SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
with DATA SLICER and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
105
Rev. 1.0
M306H1SFP
Figure 2.11.11 Typical transmit/receive timings in clock synchronous serial I/O mode
Example of transmit timing (when internal clock is selected)
D0 D1
D2 D3
D4 D5 D6
D7
D0 D1
D2 D3 D4 D5 D6 D7
D0 D1 D2 D3
D4 D5 D6
D7
Tc
TCLK
Stopped pulsing because transfer enable bit = “0”
Data is set in UARTi transmit buffer register
Tc = TCLK = 2(n + 1) / fi
fi: frequency of BRGi count source (f1, f8, f32)
n: value set to BRGi
Transfer clock
Transmit enable
bit (TE)
Transmit buffer
empty flag (Tl)
CLKi
TxDi
Transmit
register empty
flag (TXEPT)
“H”
“L”
“0”
“1”
“0”
“1”
“0”
“1”
CTSi
The above timing applies to the following settings:
Internal clock is selected.
CTS function is selected.
CLK polarity select bit = “0”.
Transmit interrupt cause select bit = “0”.
Transmit interrupt
request bit (IR)
“0”
“1”
Stopped pulsing because CTS = “H”
Transferred from UARTi transmit buffer register to UARTi transmit register
Shown in ( ) are bit symbols.
Cleared to “0” when interrupt request is accepted, or cleared by software
1 / fEXT
Dummy data is set in UARTi transmit buffer register
Transmit enable
bit (TE)
Transmit buffer
empty flag (Tl)
CLKi
RxDi
Receive complete
flag (Rl)
RTSi
“H”
“L”
“0”
“1”
“0”
“1”
“0”
“1”
Receive enable
bit (RE)
“0”
“1”
Receive data is taken in
Transferred from UARTi transmit buffer register to UARTi transmit register
Read out from UARTi receive buffer register
The above timing applies to the following settings:
External clock is selected.
RTS function is selected.
CLK polarity select bit = “0”.
fEXT: frequency of external clock
Transferred from UARTi receive register
to UARTi receive buffer register
Receive interrupt
request bit (IR)
“0”
“1”
D0 D1 D2 D3
D4 D5
D6
D7
D0
D1 D2
D3 D4
D5
Shown in ( ) are bit symbols.
Meet the following conditions are met when the CLK
input before data reception = “H”
Transmit enable bit
“1”
Receive enable bit
“1”
Dummy data write to UARTi transmit buffer register
Cleared to “0” when interrupt request is accepted, or cleared by software
Example of receive timing (when external clock is selected)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1C63557D04Q000 | 制造商:Seiko Instruments Inc (SII) 功能描述:EPSON MCU 4BIT |
| S1C63567 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63616 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63632 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63653 | 制造商:EPSON 制造商全稱:EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller |
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