參數(shù)資料
型號(hào)： RD28F6408W30T70
廠商： INTEL CORP
元件分類： 存儲(chǔ)器
英文描述： 1.8 Volt Intel Wireless Flash Memory with 3 Volt I/O and SRAM (W30)
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA80
封裝： 14 X 8 MM, 0.80 MM PITCH, STACK, CSP-80
文件頁(yè)數(shù)： 66/82頁(yè)
文件大小： 749K
代理商： RD28F6408W30T70
28F6408W30, 28F3204W30, 28F320W30, 28F640W30
60
Preliminary
NOTES:
1. The output state shows the type of data that appears at the outputs if the partition address is the same as the command
address. A partition can be placed in Read Array, Read Status or Read ID/CFI, depending on the command issued.
Each partition stays in its last output state (Array, ID/CFI or Status) until a new command changes it. The next WSM state
does not depend on the partition
’
s output state. For example, if partition #1
’
s output state is Read Array and partition #4
’
s
output state is Read Status, every read from partition #4 (without issuing a new command) outputs the Status register.
2. Illegal commands are those not defined in the command set.
3. All partitions default to Read Array mode at power-up. A Read Array command issued to a busy partition results in
undermined data when a partition address is read.
4. Both cycles of 2-cycle commands should be issued to the same partition address. If they are issued to different partitions, the
second write determines the active partition. Both partitions will output status information when read.
5. If the WSM is active, both cycles of a 2-cycle command are ignored. This differs from previous Intel devices.
6. The Clear Status command clears status register error bits except when the WSM is running (Pgm Busy, Erase Busy, Pgm
Busy In Erase Suspend, OTP Busy, EFP modes) or suspended (Erase Suspend, Pgm Suspend, Pgm Suspend In Erase
Suspend).
7. EFP writes are allowed only when status register bit SR.0 = 0. EFP is busy if Block Address = address at EFP Confirm
command. Any other commands are treated as data.
8. The
“
current state
”
is that of the WSM, not the partition.
9. Confirm commands (Lock Block, Unlock Block, Lock-down Block, Configuration Register) perform the operation and then
move to the Ready State.
Figure 29. Write State Machine
—
Next State Table (Sheet 2 of 2)
Chip
Next State after Com m and Input
Lock,
Unlock,
Lock-down,
CR setup
(5)
OTP
Setup
(5)
Lock
Block
Confirm
(9)
Lock-
Down
Block
Confirm
(9)
W rite CR
Confirm
(9)
Enhanced
Fact Pgm
Exit (blk add
<> W A0)
Illegal
com mands or
EFP data
(2)
(60H)
(C0H)
(01H)
(2FH)
(03H)
(XXXXH)
(other codes)
Ready
Lock/CR
Setup
OTP
Setup
Ready
Lock/CR Setup
Ready (Lock Error)
Ready
Ready
Ready
Ready (Lock Error)
Setup
OTP Busy
Busy
Ready
Setup
Program Busy
N/A
Busy
Program Busy
Ready
Suspend
Program Suspend
Setup
Ready (Error)
Busy
Erase Busy
Erase Busy
Ready
Suspend
Lock/CR
Setup in
Erase Susp
Erase Suspend
Setup
Program in Erase Suspend Busy
Busy
Program in Erase Suspend Busy
Erase
Suspend
Suspend
Program Suspend in Erase Suspend
Erase Suspend
(Lock Error)
Erase Susp
Erase Susp
Erase Susp
Erase Suspend (Lock Error)
Setup
Ready (Error)
EFP Busy
EFP Busy
(7)
Verify Busy
(7)
EFP Verify
EFP Busy
(7)
EFP Verify
(7)
EFP Verify
Ready
Ready
Output
Next State after Com m and Input
Status
Status
Array
Status
W
O
(
Program
Erase
Program in
Erase Suspend
Current Chip
State
(8)
OTP
Lock/CR Setup in Erase
Suspend
Enhanced
Factory
Program
Output does
not change
Output does
not change
W SM
Operation
Completes
N/A
N/A
N/A
N/A
Output does not change
Array
Status
Pgm Setup,
Erase Setup,
OTP Setup,
Pgm in Erase Susp Setup,
EFP Setup,
EFP Busy,
Verify Busy
Lock/CR Setup,
Lock/CR Setup in Erase Susp
OTP Busy
Ready,
Pgm Busy,
Pgm Suspend,
Erase Busy,
Erase Suspend,
Pgm In Erase Susp Busy,
Pgm Susp In Erase Susp
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