參數(shù)資料
型號(hào)： RD28F3208C3T90
廠商： INTEL CORP
元件分類： 存儲(chǔ)器
英文描述： 3 VOLT INTEL Advanced+BootBlock FlashMemory(C3)Stacked-ChipScalPackageFamilye
中文描述： SPECIALTY MEMORY CIRCUIT, PBGA66
封裝： 8 X 10 MM, 1.20 MM HEIGHT, SCSP-66
文件頁(yè)數(shù)： 43/70頁(yè)
文件大?。?/td> 1223K
代理商： RD28F3208C3T90
3VoltIntel
Advanced+BootBlockFlashMemoryStacked-CSPFamily
Datasheet
43
7.3
NoiseReduction
Stacked-CSPmemory’spowerswitchingcharacteristicsrequirecarefuldevicedecoupling.System
designersshouldconsiderthreesupplycurrentissuesforboththeflashandSRAM:
1.
Standbycurrentlevels(I
CCS
)
2.
Readcurrentlevels(I
CCR
)
3.
TransientpeaksproducedbyfallingandrisingedgesofF-CE#,S-CS1#,andS-CS2.
Transientcurrentmagnitudesdependonthedeviceoutputs’capacitiveandinductiveloading.Two-
linecontrolandproperdecouplingcapacitorselectionwillsuppressthesetransientvoltagepeaks.
Eachdeviceshouldhaveacapacitorsbetweenindividualpower(F-VCC,F-VCCQ
,
F-VPP
,
S-VCC)andground(GND)signals.High-frequency,inherentlylow-inductancecapacitorsshould
beplacedascloseaspossibletothepackageleads.
Noiseissueswithinasystemcancausedevicestooperateerraticallyifitisnotadequatelyfiltered.
Inordertoavoidanynoiseinteractionissueswithinasystem,itisrecommendedthatthedesign
containtheappropriatenumberofdecouplingcapacitorsinthesystem.Noiseissuescanalsobe
reducedifleadstothedevicearekeptveryshort,inordertoreduceinductance.
DecouplingcapacitorsbetweenV
CC
andV
SS
reducevoltagespikesbysupplyingtheextracurrent
neededduringswitching.Placingthesecapacitorsasclosetothedeviceaspossiblereducesline
inductance.Thecapacitorsshouldbelowinductancecapacitors;surfacemountcapacitorstypically
exhibitlowerinductance.
Itishighlyrecommendedthatsystemsusea0.1
μ
fcapacitorforeachoftheD9,D10,A10andE4
gridballoutlocations(see
Figure1,“66-BallStackedChipScalePackage”onpage 8
forballout).
Thesecapacitorsarenecessarytoavoidundesiredconditionscreatedbyexcessnoise.Smaller
capacitorscanbeusedtodecouplehigherfrequencies.
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