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www.fairchildsemi.com
Features
High speed tracking sync separator easily follows hum or
average picture level (APL) fluctuations
Glitch remover for operation in high impulse noise
environment
On chip phase-locked loop
Locks and follows VCR sync
Compatible with NTSC and PAL systems
Choice of eight output frequencies
Field ID output
Internal VCO
Applications
Digital video signal processing
Digital television receivers and VCRs
Video conferencing equipment
Multimedia computers
Description
The RC6100 contains a phase-locked loop (PLL) in a fre-
quency multiplier configuration to generate a high-
frequency clock as required for video A/D converter and dig-
ital video signal processing.
The device accepts composite video, composite sync or com-
ponent sync signals as input. The output signals generated
are: clamp gate, composite sync, horizontal sync, vertical
sync, field ID, lock detector output, oscillator output (Clock),
and Clock/2.
The NTSC output frequency choices are: 27.0, 25.175,
14.318, 13.5, 12.588, 12.273, 7.159, and 6.137 MHz. The
PAL frequencies generated are: 27.0, 17.734, 15.0, 14.75,
13.5, 8.867, 7.5, and 7.375 MHz.
Logic Symbol
CSYNC
HLOCK
HCAP
CVIN
FILTOUT
FILTIN
VSYNC
FHOUT
FIELDID
VRESET
HRESET
CLKDIV2
CLAMP
CLKOUT
CLKIN
PLLFILTER
F
S
FHIN
S0
S1
NTSC/
PAL
65-6100-01
SYNC SEPARATOR/
SELECTOR
TIMING
GENERATOR
PLL
FREQUENCY
MULTIPLIER
RC6100
Horizontal Genloc k
Rev. 1.2.1