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RC5061
13
P
is pulled LOW, the DAC scales the reference from 1.30V to
2.05V in 50mV increments. All VID codes are available, includ-
ing those below 1.80V.
Power Good (PWRGD)
The RC5061 Power Good function is designed in accordance
with the Pentium III DC-DC converter specifications and
provides a continuous voltage monitor on the VFB pin. The
circuit compares the VFB signal to the VREF voltage and
outputs an active-low interrupt signal to the CPU should the
power supply voltage deviate more than ±12% of its nominal
setpoint. The Power Good flag provides no other control
function to the RC5061.
Output Enable/Soft Start (ENABLE/SS)
The RC5061 will accept an open collector/TTL signal for
controlling the output voltage. The low state disables the output
voltage. When disabled, the PWRGD output is in the low state.
Even if an enable is not required in the circuit, this pin should
have attached a capacitor (typically 100nF) to softstart the
switching.
Over-Voltage Protection
The RC5061 constantly monitors the output voltage for protec-
tion against over-voltage conditions. If the voltage at the VFB
pin exceeds the selected program voltage, an over-voltage
condition is assumed and the RC5061 disables the output
drive signal to the external high-side MOSFET. The DC-DC
converter returns to normal operation after the output voltage
returns to normal levels.
Oscillator
The RC5061 oscillator section uses a fixed frequency of
operation of 300KHz.
Design Considerations and Component
Selection
Additional information on design and component selection
may be found in Fairchild’s Application Note 57.
MOSFET Selection
This application requires N-channel Logic Level Enhancement
Mode Field Effect Transistors. Desired characteristics are as
follows:
¥ Low Static Drain-Source On-Resistance, R
DS,ON
< 20m
(lower is better)
¥ Low gate drive voltage, V
GS
= 4.5V rated
¥ Power package with low Thermal Resistance
¥ Drain-Source voltage rating > 15V.
The on-resistance (R
DS,ON)
is the primary parameter for
MOSFET selection. The on-resistance determines the power
dissipation within the MOSFET and therefore significantly
affects the efficiency of the DC-DC Converter. For details
and a spreadsheet on MOSFET selection, refer to Applica-
tions Bulletin AB-8.
Inductor Selection
Choosing the value of the inductor is a tradeoff between
allowable ripple voltage and required transient response. The
system designer can choose any value within the allowed
minimum to maximum range in order to either minimize ripple
or maximize transient performance. The first order equation
(close approximation) for minimum inductance is:
where:
V
in
= Input Power Supply
V
out
= Output Voltage
f = DC/DC converter switching frequency
ESR = Equivalent series resistance of all output capacitors in
parallel
V
ripple
= Maximum peak to peak output ripple voltage budget.
The first order equation for maximum allowed inductance is:
where:
C
o
= The total output capacitance
I
pp
= Maximum to minimum load transient current
V
tb
= The output voltage tolerance budget allocated to load
transient
D
m
= Maximum duty cycle for the DC/DC converter (usually
95%).
Some margin should be maintained away from both L
min
and
L
max
. Adding margin by increasing L almost always adds
expense since all the variables are predetermined by system
performance except for C
O
, which must be increased to
increase L. Adding margin by decreasing L can be done by
purchasing capacitors with lower ESR. The RC5061 pro-
vides significant cost savings for the newer CPU systems
that typically run at high supply current.
RC5061 Short Circuit Current Characteristics
The RC5061 protects against output short circuit on the core
supply by turning off both the high-side and low-side
MOSFETs and resetting softstart. The short circuit limit is
set with the R
S
resistor, as given by the formula
I
SC
*R
DS, on
=
L
min
(Vin – V
out
)
f
x
V
out
V
in
x
ESR
V
ripple
=
L
max
(Vin – V
out
) D
m
V
tb
I
pp2
=
2C
O
R
S
I
Detect