參數(shù)資料
型號: PT7A4409L
英文描述: Complete Motion Control Verilog Library
中文描述: T1/E1/0C3系統(tǒng)同步?
文件頁數(shù): 5/34頁
文件大?。?/td> 306K
代理商: PT7A4409L
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Data Sheet
PT7A4402B/4402L
T1/E1 System Synchronizer
PT0100(08/02)
Ver:0
13
S0
Free-Run
S1
Normal
Primary
S1A
Auto-Holdover
Primary
S2A
Auto-Holdover
Secondary
S2
Normal
Secondary
S1H
Holdover
Primary
S2H
Holdover
Secondary
(X01)
(X00)
IR
Reset
(11X) RST=1
(11X)
(X0X)
(01X)
(X0X)
(011)
(X0X)
(01X)
(X0X)
(011)
(X0X)
(011)
(X0X)
(01X)
(010 or 11X)
(01X)
(11X)
(010 or 11X)
Notes:
(xxx): (LOS2 LOS1 GTi)
* Movement to Normal State from any state requires a
IR: Invalid Reference Signal
valid input signal.
: Phase re-alignment
: Phase continuity maintained without TIE Corrector
: Phase continuity maintained with TIE Corrector
(010 or 11X)
(11X)
l
o
r
t
n
o
C
t
u
p
n
Il
o
r
t
n
o
C
t
u
p
n
I
l
o
r
t
n
o
C
t
u
p
n
I
l
o
r
t
n
o
C
t
u
p
n
Il
o
r
t
n
o
C
t
u
p
n
Ie
t
a
t
Se
t
a
t
S
e
t
a
t
S
e
t
a
t
Se
t
a
t
S
2
S
O
L2
S
O
L
2
S
O
L
2
S
O
L2
S
O
L1
S
O
L1
S
O
L
1
S
O
L
1
S
O
L1
S
O
Li
T
Gi
T
G i
T
G i
T
Gi
T
GT
S
RT
S
R T
S
R T
S
RT
S
R
n
u
R
-
e
r
Fn
u
R
-
e
r
F
n
u
R
-
e
r
F
n
u
R
-
e
r
Fn
u
R
-
e
r
F
0
S
l
a
m
r
o
Nl
a
m
r
o
N
l
a
m
r
o
N
l
a
m
r
o
Nl
a
m
r
o
N
)
I
R
P
(
1
S
l
a
m
r
o
Nl
a
m
r
o
N
l
a
m
r
o
N
l
a
m
r
o
Nl
a
m
r
o
N
)
C
E
S
(
2
S
r
e
v
o
d
l
o
Hr
e
v
o
d
l
o
H
r
e
v
o
d
l
o
H
r
e
v
o
d
l
o
Hr
e
v
o
d
l
o
H
)
I
R
P
(
H
1
S
r
e
v
o
d
l
o
Hr
e
v
o
d
l
o
H
r
e
v
o
d
l
o
H
r
e
v
o
d
l
o
Hr
e
v
o
d
l
o
H
)
C
E
S
(
H
2
S
11
X
1
o
t
0-
0
S0
S
X0
0
1
S-
E
I
T
1
S1
SE
I
T
1
S
X0
1
S-
E
I
T
1
SE
I
T
1
SE
I
T
1
S
01
2
SH
1
S-
-
E
I
T
2
S
0
111
2
SE
I
T
2
S-
E
I
T
2
SE
I
T
2
S
11
X
1
-
H
1
SH
2
S-
-
d
n
e
g
e
Ld
n
e
g
e
L
d
n
e
g
e
L
d
n
e
g
e
Ld
n
e
g
e
Le
g
n
a
h
c
o
N
:
-
:
d
i
l
a
v
t
o
N
:
/
.
t
i
u
c
r
i
c
r
o
t
c
e
r
o
C
E
I
T
h
t
i
w
s
r
u
c
o
e
g
n
a
h
c
e
t
a
t
S
:
E
I
T
.
e
t
a
t
s
r
e
v
o
d
l
o
H
-
o
t
u
A
m
o
r
f
d
n
a
o
t
s
e
g
n
a
h
c
e
t
a
t
s
r
o
f
7
e
r
u
g
i
f
o
t
r
e
f
e
R
Table 7. Automatic Operation Mode (MS1 MS2=11, RSEL=0)
Figure 7. Diagram of State Change in Automatic Mode
相關(guān)PDF資料
PDF描述
PT7A4410 PWM Waveform Generator Accelerator Verilog Module
PT7A4410L Incremental Encoder Interface Accelerator Verilog Module
PT7A5020 Power Diagnostics Function Accelerator Verilog Module
PT7A6525 Reference design kit featuring a High Power Class D Audio Power Amplifier
PT7A6525L 60V Single N-Channel HEXFET Power MOSFET in a TO-247AC package
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PT7A4410 制造商:未知廠家 制造商全稱:未知廠家 功能描述:T1/E1/OC3 System Synchronizer
PT7A4410J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:T1/E1/OC3 System Synchronizer
PT7A4410L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:T1/E1/OC3 System Synchronizer
PT7A4410LJ 制造商:未知廠家 制造商全稱:未知廠家 功能描述:T1/E1/OC3 System Synchronizer
PT7A5020 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2048 Ports Non-Blocking Time-Slot Switch?