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參數(shù)資料
| 型號： | PNX8510 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Analog companion chip |
| 中文描述： | 模擬伴隨芯片 |
| 文件頁數(shù)： | 50/92頁 |
| 文件大?。?/td> | 3064K |
| 代理商： | PNX8510 |
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Philips Semiconductors
PNX8510/11
Analog companion chip
Product data
Rev. 04 – 12 January 2004
50 of 92
9397 750 12612
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7:0
0x63=FSC0
0x64=FSC1
0x65=FSC2
0x66=FSC3
R/W
0x2A0
98ACB
ffsc: subcarrier frequency (in multiples of line frequency)
fllc: clock frequency (in multiples of line frequency)
FSC = round ((ffsc/fllc)x2^32)
FSC3 most significant byte
FSC0 least significant byte
NTSC-M: ffsc 227.5, fllc 1716 -> FSC = 21F07C1F
PAL-B/G: ffsc 283.7516, fllc 1728 -> FSC = 2A098ACB
SECAM: ffsc 274.304, fllc 1728 -> FSC = 28A33BB2
Offset 0x67 - L21O0
7:0
L21O0
Offset 0x68 - L21O1
7:0
L21O1
Offset 0x69 - L21E0
7:0
L21E0
Offset 0x6A - L21E1
7:0
L21E1
Offset 0x6B - Must be initialized to zero.
Offset 0x6C - TRGCTL1*
7:0
HTRIG
R/W
0x0
First byte of closed captioning data, odd field
R/W
0x0
Second byte of closed captioning data, odd field
R/W
0x0
First byte of closed captioning data, even field
R/W
0x0
Second byte of closed captioning data, even field
R/W
0x01
Sets horizontal trigger phase related to encoder input.
Values above 1715 (FISE=1) or 1727 (FISE=0) are not allowed.
Increasing HTRIG decreases delay as of all internally generated
timing signals. This register is for the SD path.
Reference mark: analog output horizontal sync (leading slope)
coincides with active edge of RCV used for triggering at
HTRIG=0x398.
Offset 0x6D - TRGCTL2*
7:5
HTRIG
R/W
0x1
Sets horizontal trigger phase related to encoder input.This register
is for the SD path.
Increasing VTRIG decreases delays of all internally generated
timing signals measured in half lines.
Variation range of VTRIG = 0 to 0x1F
4:0
VTRIG
R/W
0x0
Offset 0x6E - MULTICTL
7
Unused
6
BLCKON
-
0
R/W
0 = Encoder in normal operation mode
1 = Output signal is forced to blanking level. This doesn’t shutdown
the sync and leaves it running.
Selects the phase reset mode of the color subcarrier.
00 = No phase reset or reset via RTC
01 = Phase reset every two lines
10 = Reset every eight fields
11 = Reset every four fields
5:4
PHRES
R/W
0x2
Table 29:
* indicates not present in secondary video channel
Bit
Symbol
PNX8510/11 video registers
…continued
Access Value
Description
相關PDF資料 |
PDF描述 |
|---|---|
| PNX8511 | Analog companion chip |
| PNX8526 | Programmable source decoder with integrated peripherals |
| PNX8526EH | Programmable source decoder with integrated peripherals |
| PPC5001T | NPN microwave power transistor |
| PRLL4001 | Rectifiers |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PNX8510HW/B1 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Analog companion chip |
| PNX8511 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Analog companion chip |
| PNX8511HW/B1 | 功能描述:視頻 IC ANALOG BACKEND COMPANION RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| PNX8511HW/B1,557 | 功能描述:視頻 IC ANALOG BACKEND RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| PNX8526 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Programmable source decoder with integrated peripherals |
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