參數(shù)資料
型號(hào)： PNX8510
廠商： NXP Semiconductors N.V.
英文描述： Analog companion chip
中文描述： 模擬伴隨芯片
文件頁(yè)數(shù)： 18/92頁(yè)
文件大小： 3064K
代理商： PNX8510
Philips Semiconductors
PNX8510/11
Analog companion chip
Product data
Rev. 04 – 12 January 2004
18 of 92
9397 750 12612
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
7.1.8
PAL/NTSC/SECAM encoder
The PAL/NTSC/SECAM encoder accepts the YUV data and encodes it into an NTSC,
PAL or SECAM video signal. From Y, U and V data, the encoder generates
luminance, chrominance and subcarrier output signals, suitable for use as CVBS or
separate Y and C signals.
Luminance is modified in gain and in offset (offset is programmable to enable different
black level setups). In order to enable easy analog post filtering, luminance is
interpolated from a 13.5 MHz data rate to a 27 MHz data rate, providing luminance in
10-bit resolution. This filter is also used to define smoothed transients for
synchronization pulses and the blanking period. Chrominance is modified in gain
(programmable separately for U and V). The standard dependent burst is inserted
before baseband color signals are interpolated from a 6.75 MHz data rate to a
27 MHz data rate.
One of the interpolation stages can be bypassed providing a higher color bandwidth,
which can be used for Y and C output. The register bits FSC0 to FSC3 set the
subcarrier frequency. To make sure the subcarrier is locked to the line frequency, as
the standards require, the sync generator is able to reset the subcarrier generation
periodically. This feature is controlled by the PHRES (register MULTICTL, offset
0x6E) programming bits. These features are available to generate a standard
interlaced signal; they will not work in non-interlaced mode.
A crystal-stable master clock of 27 MHz, which is twice the CCIR line-locked pixel
clock of 13.5 MHz, is received from the interface clock pins. The encoder synthesizes
all necessary internal signals, color subcarrier frequency, and synchronization signals
from that clock.
For ease of analog post filtering, the signals are twice oversampled with respect to
the pixel clock before digital-to-analog conversion.
HD operation mode
Fig 15. Primary display pipe
MDB649
DEMUX
BYPASS
Y/R-DAC
U/CB/PB/G-DAC
V/CR/B-DAC
GAIN CONTROL
SYNC-RASTER
GENERATOR
UP-SAMPLE
BYPASS
D1-INTERFACE
SYNC
EXTRACT
(1)
D1-INTERFACE
SYNC
EXTRACT
SYNC-INSERT
LEVEL-SHIFT
SYNC-SHAPER
CBLANK
secondary
D1
primary
D1
V/O_E
V/O_E
H
H
V
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PNX8510HW/B1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Analog companion chip
PNX8511 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Analog companion chip
PNX8511HW/B1 功能描述:視頻 IC ANALOG BACKEND COMPANION RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
PNX8511HW/B1,557 功能描述:視頻 IC ANALOG BACKEND RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
PNX8526 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Programmable source decoder with integrated peripherals
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