參數(shù)資料
型號： PNX3000N3
廠商： NXP Semiconductors N.V.
英文描述： Analog front end for digital video processors
中文描述： 模擬前端數(shù)字視頻處理器
文件頁數(shù)： 30/51頁
文件大小： 285K
代理商： PNX3000N3
2004 Oct 04
30
Philips Semiconductors
Preliminary specification
Analog front end for digital video
processors
PNX3000
Video switches
CVBS
AND
YC
SWITCHES
V
i(CVBS/Y)(p-p)
CVBS or Y input voltage
(peak-to-peak value)
CVBS or Y clipping level
CVBS or Y input current
1.0
1.76
V
V
i(CVBS/Y)(clip)
I
i(CVBS/Y)
black-to-peak video
outside clamp pulse
during clamp pulse
note 10
10
50
1.33
0
+10
V
μ
A
μ
A
dB
α
sup(CVBSn)
suppression of
non-selected CVBS input
signal
chrominance input voltage
(peak-to-peak value)
chrominance input
impedance
V
i(C)(p-p)
100 % colour bar; note 3
885
1264
mV
Z
i(C)
50
k
V
IDEO IDENT FUNCTION
V
sync(min)
minimum sync pulse
amplitude
delay time of identification
70
100
140
mV
t
d(ident)
I
2
C-bus status bit VID = 1; after
the Video IF AGC has
stabilized on a new transmitter
10
ms
A
NALOG
CVBS
OUTPUTS
:
PINS
CVBSOUTA
AND
CVBSOUTB
Z
o
V
o(p-p)
output impedance
output signal amplitude
(peak-to-peak value)
DC output level
2.0
250
V
at input signal of 1.0 V (p-p)
V
O
top sync
output muted
0.4
0.5
V
V
D
IGITAL OUTPUTS
CVBS/Y signal
n
d(black)
decimal digital output level
for black
decimal digital output level
for white
black clamp mode
240
n
d(white)
nominal input signal
652
C signal
n
d(black)
decimal digital output level
for black
decimal digital output
amplitude (peak-to-peak
value)
480
512
544
n
d(p-p)
nominal input level; 100 %
colour bar
520
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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