參數(shù)資料
型號： PLL1700E
英文描述： MULTI-CLOCK GENERATOR
中文描述： 多時鐘發(fā)生器
文件頁數(shù)： 3/9頁
文件大小： 137K
代理商： PLL1700E
3
PLL1700
PIN ASSIGNMENTS
PIN CONFIGURATION
TOP VIEW
SSOP
PACKAGE INFORMATION
PACKAGE
DRAWING
NUMBER
(1)
TEMPERATURE
RANGE
PRODUCT
PACKAGE
PLL1700E
20-Lead SSOP
–25
°
C to +85
°
C
334-1
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (+V
, +V
, +V
DDB
) .............................................. +6.5V
Supply Voltage Differences (+V
) .......................................
±
0.1V
GND Voltage Differences: GND, GNDP, GNDB...............................
±
0.1V
Digital Input Voltage................................................. –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ............................................ –0.3V to (V
+ 0.3V)
Input Current (any pins except supply pins) ...................................
±
10mA
Power Dissipation .......................................................................... 300mW
Operating Temperature Range ......................................... –25
°
C to +85
°
C
Storage Temperature...................................................... –55
°
C to +125
°
C
Lead Temperature (soldering, 5s) ................................................. +260
°
C
Package Temperature (IR reflow, 10s) .......................................... +235
°
C
PIN
NAME
I/O
FUNCTION
1
ML/SR0
IN
Latch Enable for Software Mode/Sampling Rate
Selection for Hardware Mode. When MODE pin
is LOW, ML is selected.
(1)
2
MODE
IN
Mode Control Select. When this pin is HIGH,
device is operated in hardware mode using SR0
(pin 1), FS0 (pin 19), and FS1 (pin 20). When
this pin is LOW, device is operated in software
mode by three-wire interface using ML (pin 1),
MD (pin 19) and MC (pin 20).
(1)
3
V
DD
—
Digital Power Supply, +5V.
4
GND
—
Digital Ground.
5
XT2
—
27MHz Crystal. When an external 27MHz clock
is applied to XT1 (pin 6), this pin must be
connected to GND.
6
XT1
IN
27MHz Oscillator Input/External 27MHz Input.
7
GNDP
—
Ground for PLL.
8
V
DDP
—
Power Supply for PLL, +5V.
9
RSV
—
Reserved. Must be left open.
10
MCKO
OUT
27MHz Output.
11
MCKO
OUT
Inverted 27MHz Output.
12
SCKO1
OUT
Fixed 33.8688MHz Clock Output.
13
SCKO4
OUT
768f
S
Clock Output.
14
SCKO2
OUT
256f
S
Clock Output.
15
GNDB
—
Digital Ground for V
DDB
.
16
V
DDB
—
Digital Power Supply for Clock Output Buffers,
+3.3V.
17
SCKO3
OUT
384f
Output. This output has been optimized
for the lowest jitter and should be connected to
the audio DAC(s).
18
RST
IN
Reset. When this pin is LOW, device is held in
reset.
(1)
19
MD/FS0
IN
Serial Data Input for Software Mode/Sampling
Frequency Selection for Hardware Mode. When
MODE pin is LOW, MD is selected.
(1)
20
MC/FS1
IN
Shift Clock Input for Software Mode/Sampling
Frequency Selection for Hardware Mode. When
MODE pin is LOW, MC is selected.
(1)
NOTE: (1) Schmitt-trigger input with internal pull-down resistors.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
ML/SR0
MODE
V
DD
GND
XT2
XT1
GNDP
V
DDP
RSV
MCKO
MC/FS1
MD/FS0
RST
SCKO3
V
DDB
GNDB
SCKO2
SCKO4
SCKO1
MCKO
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
PLL1700E
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PLL1700E/2K 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Multi-Clock Gen RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
PLL1700E/2KG4 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Multi-Clock Gen RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
PLL1700EG 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Multi-Clock Gen RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
PLL1700EG/2K 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Multi-Clock Gen RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
PLL1700EG/2KE6 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Multi-Clock Gen RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
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