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參數(shù)資料
| 型號(hào)： | PLL1708DBQR |
| 英文描述： | 3.3 V DUAL PLL MULTICLOCK GENERATOR |
| 中文描述： | 3.3 V雙鎖相環(huán)MULTICLOCK發(fā)生器 |
| 文件頁數(shù)： | 1/22頁 |
| 文件大小： | 171K |
| 代理商： | PLL1708DBQR |
SLES065 – DECEMBER 2002
FEATURES
27-MHz Master Clock Input
Generated Audio System Clock (PLL1707):
– SCKO0: 768 f
S
(f
S
= 44.1 kHz)
– SCKO1: 768 f
S
, 512 f
S
(f
S
= 48 kHz)
– SCKO2: 256 f
S
(f
S
= 32, 44.1, 48, 64, 88.2,
96 kHz)
– SCKO3: 384 f
S
(f
S
= 32, 44.1, 48, 64, 88.2,
96 kHz)
Generated Audio System Clock (PLL1708):
– SCKO0: 768 f
S
(f
S
= 44.1 kHz)
– SCKO1: 768 f
S
, 512 f
S
, 384 f
S
, 256 f
S
(f
S
= 48 kHz)
– SCKO2: 256 f
S
(f
S
= 16, 22.05, 24, 32, 44.1,
48, 64, 88.2, 96 kHz)
– SCKO3: 384 f
S
(f
S
= 16, 22.05, 24, 32, 44.1,
48, 64, 88.2, 96 kHz)
Zero PPM Error Output Clocks
Low Clock Jitter: 50 ps (Typical)
Multiple Sampling Frequencies (PLL1707):
– f
S
= 32, 44.1, 48, 64, 88.2, 96 kHz
Multiple Sampling Frequencies (PLL1708):
– f
S
= 16, 22.05, 24, 32, 44.1, 48, 64, 88.2,
96 kHz
3.3-V Single Power Supply
PLL1707: Parallel Control
PLL1708: Serial Control
Package: 20-Pin SSOP (150 mil), Lead-Free
Product
APPLICATIONS
HDD + DVD Recorders
DVD Recorders
HDD Recorders
DVD Players
DVD Add-On Cards for Multimedia PCs
Digital HDTV Systems
Set-Top Boxes
DESCRIPTION
The PLL1707
and PLL1708
are low cost, phase-locked
loop (PLL) multiclock generators. The PLL1707 and
PLL1708 can generate four system clocks from a 27-MHz
reference input frequency. The clock outputs of the
PLL1707 can be controlled by sampling frequency-control
pins and those of the PLL1708 can be controlled through
serial-mode control pins. The device gives customers both
cost and space savings by eliminating external
components and enables customers to achieve the very
low-jitter performance needed for high performance audio
DACs and/or ADCs. The PLL1707 and PLL1708 are ideal
for MPEG-2 applications which use a 27-MHz master
clock such as DVD recorders, HDD recorders, DVD
add-on cards for multimedia PCs, digital HDTV systems,
and set-top boxes.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate
precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to
damage because very small parametric changes could cause the device not to meet its published specifications.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
The PLL1707 and PLL1708 use the same die and they are electrically identical except for mode control.
Copyright
2002, Texas Instruments Incorporated
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相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PLL1707 | 3.3 V DUAL PLL MULTICLOCK GENERATOR |
| PLL1708 | 3.3 V DUAL PLL MULTICLOCK GENERATOR |
| PLS100 | Programmable logic arrays 16 】 48 】 8 |
| PLS101 | Programmable logic arrays 16 】 48 】 8 |
| PLS101A | Programmable logic arrays 16 】 48 】 8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PLL1708DBQRG4 | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 Dual PLL Multi Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| PLL1720A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:PHASE LOCKED LOOP |
| PLL-17-Y2-1 | 功能描述:電線鑒定 Laser, Comp Label, Polyester, 1.88" W x RoHS:否 制造商:TE Connectivity / Q-Cees 產(chǎn)品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長(zhǎng)度:1 in |
| PLL-17-Y2-2.5 | 功能描述:電線鑒定 Laser, Comp Label, Polyester, 1.88" W x RoHS:否 制造商:TE Connectivity / Q-Cees 產(chǎn)品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長(zhǎng)度:1 in |
| PLL-17-Y2Y-1 | 制造商:Panduit Corp 功能描述: |
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