參數(shù)資料
型號: PIC16C56A-20I/JW
元件分類: 微控制器/微處理器
英文描述: 8-BIT, UVPROM, 20 MHz, RISC MICROCONTROLLER, CDIP18
封裝: 0.300 INCH, WINDOWED, CERDIP-18
文件頁數(shù): 96/158頁
文件大小: 1194K
代理商: PIC16C56A-20I/JW
PIC16C5X
DS30453C-page 42
Preliminary
2000 Microchip Technology Inc.
FIGURE 7-16: EXTERNAL BROWN-OUT
PROTECTION CIRCUIT 3
7.9
Power-down Mode (SLEEP)
A device may be powered down (SLEEP) and later
powered up (wake-up from SLEEP).
7.9.1
SLEEP
The Power-down mode is entered by executing a
SLEEP
instruction.
If enabled, the Watchdog Timer will be cleared but
keeps running, the TO bit (STATUS<4>) is set, the PD
bit (STATUS<3>) is cleared and the oscillator driver is
turned off. The I/O ports maintain the status they had
before the SLEEP instruction was executed (driving
high, driving low, or hi-impedance).
It should be noted that a RESET generated by a WDT
time-out does not drive the MCLR/VPP pin low.
For lowest current consumption while powered down,
the T0CKI input should be at VDD or VSS and the
MCLR/VPP pin must be at a logic high level.
7.9.2
WAKE-UP FROM SLEEP
The device can wake-up from SLEEP through one of
the following events:
1.
An external RESET input on MCLR/VPP pin.
2.
A Watchdog Timer time-out RESET (if WDT was
enabled).
Both of these events cause a device RESET. The TO
and PD bits can be used to determine the cause of
device RESET. The TO bit is cleared if a WDT time-out
occurred (and caused wake-up). The PD bit, which is
set on power-up, is cleared when SLEEP is invoked.
The WDT is cleared when the device wakes from
SLEEP, regardless of the wake-up source.
This brown-out protection circuit employs Micro-
chip Technology’s MCP809 microcontroller super-
visor.
The MCP8XX and MCP1XX families of
supervisors provide push-pull and open collector
outputs with both "active high and active low"
RESET pins. There are 7 different trip point selec-
tions to accommodate 5V and 3V systems.
MCLR
PIC16C62X
VDD
Vss
RST
MCP809
VDD
bypass
capacitor
VDD
7.10
Program Verification/Code Protection
If the code protection bit(s) have not been pro-
grammed, the on-chip program memory can be read
out for verification purposes.
7.11
ID Locations
Four memory locations are designated as ID locations,
where the user can store checksum or other
code-identification numbers. These locations are not
accessible during normal execution but are readable
and writable during program/verify.
Use only the lower 4 bits of the ID locations and always
program the upper 8 bits as ’1’s.
Note:
Microchip does not recommend code pro-
tecting windowed devices.
Note:
Microchip will assign a unique pattern
number for QTP and SQTP requests and
for ROM devices. This pattern number will
be unique and traceable to the submitted
code.
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