參數(shù)資料
型號(hào): PIC12F519
廠商: Microchip Technology Inc.
英文描述: 8-Pin, 8-Bit Flash Microcontroller
中文描述: 8引腳,8位閃存微控制器
文件頁數(shù): 25/88頁
文件大小: 802K
代理商: PIC12F519
2007 Microchip Technology Inc.
Preliminary
DS41319A-page 23
PIC12F519
5.1
Reading Data Memory
To read a memory location, the user must write the
address to be read into the EEADR register and then
set the RD bit in the EECON register. The data will be
available in the next instruction cycle. The CPU will
stall during read operation.
EXAMPLE 5-1:
FLASH DATA MEMORY
READ
5.2
Erasing a Data Memory Row
In order to write new data to the Flash data memory,
the program memory row that is being addressed by
EEADR<5:0> must be erased.
To prevent a spurious row erasure, a specific
sequence must be executed to initiate the erase to the
program memory. The sequence is as follows:
- Set the FREE bit (enable Flash data memory
row erase)
- Set the WREN bit (enable writes to the Flash
data memory array)
- set the WR bit (initiates the row erase of the
Flash data memory array)
If the WREN bit is not set in the instruction cycle after
the FREE bit is set, the FREE bit will be cleared in
hardware.
If the WR bit is not set in the instruction cycle after the
WREN bit is set, the WREN bit will be cleared in
hardware.
EXAMPLE 5-2:
ERASE DATA MEMORY
ROW
5.3
Writing a Data Memory Word
To write a memory location, the user must write the
address to be written to into the EEADR register. He
must then load the data to be written into the EEDATA
register. Once the data and address have been
loaded, a specific sequence must be executed to
initiate the write to the program memory. The
sequence is as follows:
Set the WREN bit (enable writes to the Flash data
memory array)
Set the WR bit (initiates the write to the Flash data
memory array)
If the WR bit is not set in the instruction cycle after the
WREN bit is set, the WREN bit will be cleared in hard-
ware.
This sequence is to prevent an accidental write to the
Flash memory.
Note:
Only a BSF command will work to enable the
Flash data memory read documented in
Example 5-1. No other sequence of com-
mands will work, no exceptions.
BSF
MOVLW
BSF
FSR,5
EE_ADR_READ;LOAD ADDRESS TO READ
EECON,RD
;INITITATE THE READ
INSTRUCTION
;SWITCH TO BANK 1
NOP
MOVF
;INSTRUCTION IGNORED
;GET NEW DATA
EEDATA,W
Note 1:
The FREE bit may be set by any com-
mand normally used by the core. How-
ever, the WREN and WR bits can only be
set using a series of BSF commands, as
documented in Example 5-2. No other
sequence of commands will work, no
exceptions.
2:
The upper 3 bits of the EEADR register
indicates which row is to be erased.
BSF
MOVLW EE_ADR_ERASE ;LOAD ADDRESS TO ERASE
MOVWF EEADR
;LOAD ADDRESS TO SFR
BSF
EECON,FREE
; SELECT ERASE
BSF
EECON,WREN
; ENABL FLASH PROG’ING
BSF
EECON,WR
; INITITATE ERASE
FSR,5
;SWITCH TO BANK 1
xxx
;NEXT INSTRUCTION
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