
PIC12F510/16F506
DS41268B-page 88
Preliminary
2006 Microchip Technology Inc.
13.3
DC Characteristics: PIC12F510/16F506 (Industrial, Extended)
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise specified)
Operating Temperature
-40°C
≤
T
A
≤
+85°C (industrial)
-40°C
≤
T
A
≤
+125°C (extended)
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
V
IL
Input Low Voltage
I/O ports
D030
with TTL buffer
V
SS
—
0.8V
V
For 4.5
≤
V
DD
≤
5.5V
otherwise
D030A
V
SS
—
0.15 V
DD
V
D031
with Schmitt Trigger buffer
V
SS
—
0.15 V
DD
V
D032
MCLR, T0CKI
OSC1 (in EXTRC), EC
(1)
V
SS
—
0.15 V
DD
V
D033
V
SS
—
0.15 V
DD
V
D033
OSC1 (in HS)
V
SS
—
0.3 V
DD
V
D033
OSC1 (in XT and LP)
V
SS
—
0.3 V
DD
V
V
IH
Input High Voltage
I/O ports
—
D040
with TTL buffer
2.0
—
V
DD
V
4.5
≤
V
DD
≤
5.5V
Otherwise
D040A
0.25 V
DD
—
V
DD
V
+ 0.8V
D041
with Schmitt Trigger buffer
0.85 V
DD
—
V
DD
V
For entire V
DD
range
D042
MCLR, T0CKI
OSC1 (in EXTRC), EC
(1)
0.85 V
DD
—
V
DD
V
D043
0.85 V
DD
—
V
DD
V
D043
OSC1 (in HS)
0.7 V
DD
—
V
DD
V
D043
OSC1 (in XT and LP)
1.6
—
V
DD
V
μ
A
D070
I
PUR
GPIO/PORTB Weak Pull-up Current
Input Leakage Current
(2), (3)
TBD
250
TBD
V
DD
= 5V, V
PIN
= V
SS
I
IL
D070
GPIO Weak Pull-up Current (GP3)
TBD
225
TBD
μ
A
V
DD
= 5V
V
PIN
= 0V
Vss
≤
V
PIN
≤
V
DD
, Pin at high-impedance
Vss
≤
V
PIN
≤
V
DD
Vss
≤
V
PIN
≤
V
DD
, XT, HS and LP oscillator
configuration
D060
I/O ports
GP3/RB3/MCLR
(4)
—
—
±1
μ
A
μ
A
μ
A
D061A
—
—
±5
D063
OSC1
—
—
±5
Output Low Voltage
D080
V
OL
I/O ports/CLKOUT
—
—
0.6
V
I
OL
= 8.5 mA, V
DD
= 4.5V, –40
°
C to +85
°
C
I
OL
= 7.0 mA, V
DD
= 4.5V, –40
°
C to +125
°
C
I
OL
= 1.6 mA, V
DD
= 4.5V, –40
°
C to +85
°
C
I
OL
= 1.2 mA, V
DD
= 4.5V, –40
°
C to +125
°
C
D080A
—
—
0.6
V
D083
OSC2
—
—
0.6
V
D083A
—
—
0.6
V
Output High Voltage
I/O ports/CLKOUT
(3)
D090
V
OH
V
DD
– 0.7
—
—
V
I
OH
= -3.0 mA, V
DD
= 4.5V, –40
°
C to +85
°
C
I
OH
= -2.5 mA, V
DD
= 4.5V, –40
°
C to +125
°
C
I
OH
= -1.3 mA, V
DD
= 4.5V, –40
°
C to +85
°
C
I
OH
= -1.0 mA, V
DD
= 4.5V, –40
°
C to +125
°
C
D090A
V
DD
– 0.7
—
—
V
D092
OSC2
V
DD
– 0.7
—
—
V
D092A
V
DD
– 0.7
—
—
V
Capacitive Loading Specs on Output Pins
D100
C
OSC
2
OSC2 pin
—
—
15
pF
In XT, HS and LP modes when external
clock is used to drive OSC1.
D101
C
IO
All I/O pins
—
—
50
pF
Legend:
TBD = To be determined.
Data in “Typ” column is at 5V, 25
°
C unless otherwise stated. These parameters are for design guidance only and are not tested.
In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC12F510/16F506 be
driven with external clock in RC mode.
The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating
conditions. Higher leakage current may be measured at different input voltages.
Negative current is defined as coming out of the pin.
This specification applies when GP3/MCLR is configured as an input with pull-up disabled. The leakage current of the MCLR circuit is
higher than the standard I/O logic.
Note
1:
2:
3:
4: