參數(shù)資料
型號(hào): PI7C7100CNA
廠商: Pericom Semiconductor Corp.
英文描述: 3-Port PCI Bridge
中文描述: 3端口PCI橋
文件頁(yè)數(shù): 34/132頁(yè)
文件大小: 2559K
代理商: PI7C7100CNA
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After PI7C7100 makes 2
24
(default) attempts of the same delayed read transaction on the target bus, PI7C7100 asserts
P_SERR# if the primary SERR# enable bit is set (bit 8 of command register for secondary bus S1 or S2) and the delayed-
write-non-delivery bit is not set. The delayed-write-non-delivery bit is bit 5 of P_SERR# event disable register (offset 64h).
PI7C7100 will report system error. See Section 7.4 for a description of system error conditions.
4.8.4 Target Termination Initiated by PI7C7100
PI7C7100 can return a target retry, target disconnect, or target abort to an initiator for reasons other than detection of that
condition at the target interface.
PI7C7100
3-Port PCI Bridge
ADVANCE INFORMATION
4.8.4.1 Target Retry
PI7C7100 returns a target retry to the initiator when it cannot accept write data or return read data as a result of internal
conditions. PI7C7100 returns a target retry to an initiator when any of the following conditions is met:
For delayed write transactions:
The transaction is being entered into the delayed transaction queue.
Transaction has already been entered into delayed transaction queue, but target response has not yet been
received.
Target response has been received but has not progressed to the head of the return queue.
The delayed transaction queue is full, and the transaction cannot be queued.
A transaction with the same address and command has been queued.
A locked sequence is being propagated across PI7C7100, and the write transaction is not a locked transaction.
The target bus is locked and the write transaction is a locked transaction.
Use more than 16 clocks to accept this transaction.
For delayed read transactions:
The transaction is being entered into the delayed transaction queue.
The read request has already been queued, but read data is not yet available.
Data has been read from target, but it is not yet at head of the read data queue, or a posted write transaction
precedes it.
The delayed transaction queue is full, and the transaction cannot be queued.
A delayed read request with the same address and bus command has already been queued.
A locked sequence is being propagated across PI7C7100, and the read transaction is not a locked transaction.
PI7C7100 is currently discarding previously pre-fetched read data.
The target bus is locked and the write transaction is a locked transaction.
Use more than 16 clocks to accept this transaction.
For posted write transactions:
The posted write data buffer does not have enough space for address and at least one DWORD of write data.
A locked sequence is being propagated across PI7C7100, and the write transaction is not a locked transaction.
When a target retry is returned to the initiator of a delayed transaction, the initiator must repeat the transaction with the
same address and bus command as well as the data if it is a write transaction, within the time frame specified by the master
timeout value. Otherwise, the transaction is discarded from the buffers.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C7300 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:3-PORT PCI-to-PCI BRIDGE
PI7C7300A 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:3-PORT PCI-to-PCI BRIDGE
PI7C7300AEVB-3 功能描述:界面開(kāi)發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
PI7C7300ANA 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA
PI7C7300ANAE 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 3 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray