參數(shù)資料
型號: PHT6N03LT
廠商: NXP SEMICONDUCTORS
元件分類: JFETs
英文描述: TrenchMOS transistor Logic level FET
中文描述: 5.9 A, 30 V, 0.03 ohm, N-CHANNEL, Si, POWER, MOSFET
封裝: SOT-223, 4 PIN
文件頁數(shù): 3/6頁
文件大?。?/td> 53K
代理商: PHT6N03LT
Philips Semiconductors
Product specification
TrenchMOS
transistor
Logic level FET
PHT6N03LT
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER
W
DSS
Drain-source non-repetitive
unclamped inductive turn-off
energy
CONDITIONS
I
D
= 5.9 A; V
DD
15 V;
V
GS
= 10 V; R
GS
= 50
; T
amb
= 25 C
MIN.
-
MAX.
60
UNIT
mJ
Fig.1. Normalised power dissipation.
PD% = 100
P
D
/P
D 25 C
= f(T
amb
)
Fig.2. Normalised continuous drain current.
ID% = 100
I
D
/I
D 25 C
= f(T
amb
); conditions: V
GS
5 V
Fig.3. Safe operating area. T
= 25 C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.4. Transient thermal impedance.
Z
th j-amb
= f(t); parameter D = t
p
/T
0
20
40
60
80
100
120
140
Tamb / C
PD%
Normalised Power Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
0.1
1
10
100
1000
0.01
0.1
1
10
100
7830-30
VDS / V
ID / A
RDS(ON)=VDS/ID
tp = 10 us
100 us
1 ms
10 ms
100 ms
DC
0
20
40
60
80
100
120
140
Ambient temperature, Tamb (C)
ID%
Normalised Current Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
1E-07
1E-05
1E-03
1E-01
1E+01
1E+03
BUKX83
t / s
Zth j-amb / (K/W)
D =
1E+02
1E+01
1E+00
1E-01
1E-02
0
0.5
0.2
0.1
0.05
0.02
D =
t
p
t
p
T
T
P
D
t
January 1998
3
Rev 1.300
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