參數(shù)資料
型號(hào): PHD24N03LT
廠商: NXP SEMICONDUCTORS
元件分類(lèi): JFETs
英文描述: N-channel enhancement mode field-effect transistor
中文描述: 20 A, 30 V, 0.056 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-252AA
封裝: PLASTIC, SC-63, DPAK-3
文件頁(yè)數(shù): 3/13頁(yè)
文件大小: 368K
代理商: PHD24N03LT
Philips Semiconductors
PHD24N03LT
N-channel enhancement mode field-effect transistor
Product specification
Rev. 02 — 27 July 2000
3 of 13
9397 750 07311
Philips Electronics N.V. 2000. All rights reserved.
V
GS
5 V
Fig 1.
Normalized total power dissipation as a
function of mounting base temperature.
Fig 2.
Normalized continuous drain current as a
function of mounting base temperature.
T
mb
= 25
°
C; I
DM
is single pulse.
Unclamped inductive load; V
DD
15 V; R
GS
= 50
;
V
GS
= 5 V; starting T
j
= 25
°
C and 150
°
C.
Fig 4.
Non-repetitive avalanche ruggedness current
as a function of pulse duration.
Fig 3.
Safe operating area; continuous and peak drain
currents as a function of drain-source voltage.
03aa16
0
20
40
60
80
100
120
0
25
50
75
100
125
150
175
Tmb (oC)
200
Pder
(%)
03aa24
0
20
40
60
80
100
120
Ider
(%)
0
25
50
75
100
125
150
Tmb (oC)
175
200
P
der
P
tot 25 C
°
)
----------------------
100
%
×
=
I
der
I
D 25 C
°
)
------------------
100
%
×
=
03aa99
1
10
102
1
10
102
VDS(V)
ID
(A)
D.C.
100 ms
10 ms
RDSon= VDS/ ID
1 ms
tp= 10
μ
s
100
μ
s
tp
tp
T
T
P
t
δ
=
03ab07
1
10
102
10-2
10-1
1
10
tp(ms)
IAS
(A)
T
j
prior to avalanche = 150
o
C
25oC
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