參數(shù)資料
型號(hào): PEDL9352-01
廠商: OKI SEMICONDUCTOR CO., LTD.
英文描述: 128-Channel Organic EL Driver with Built-in RAM
中文描述: 128通道有機(jī)EL帶內(nèi)置驅(qū)動(dòng)器在RAM
文件頁數(shù): 27/53頁
文件大?。?/td> 302K
代理商: PEDL9352-01
PEDL9352-01
OKI Semiconductor
ML9352
33/53
LIST OF COMMANDS
Dn
No
Operation
(ML9352)
7
6
5
4
3
2
1
0
A0
RD WR
Comment
Display OFF
1
0
1
0
1
0
1
0
EL display OFF
1
Display ON
1
0
1
0
1
0
1
0
EL display ON
1
0
1
0
*
0
1
0
32-line display
Display line number set
1
0
1
*
0
1
0
2
Display line number register
set
*
No. of display lines
0
1
0
Sets the number of display lines to the
display line number register.
1
0
1
0
*
0
1
0
Without a fixed display line
Fixed display line number
set
1
0
1
*
0
1
0
3
Fixed display line number
register set
*
No. of fixed
display
lines
0
1
0
Sets the number of fixed display lines
to the fixed display line number
register.
4 Scroll start line set
0
1
Display start line
address
0
1
0
Sets the scroll start line address of the
display data RAM.
Write address set mode
1
0
1
*
0
1
0
5
Write address register set
*
Write address
0
1
0
data RAM.
Column address set (upper) 0
0
1
Column address
(Upper)
0
1
0
Sets the upper 4 bits of column
address of the display data RAM.
6
Column address set (lower) 0
0
Column address
(Lower)
0
1
0
Sets the lower 4 bits of column
address of the display data RAM.
7 Status read
Status
0
1
Reads the status information using
the upper 4 bits.
8 Display data write
Write data
1
0
Writes data to the display data RAM.
9 Display data read
Read data
1
0
1
Reads data from the display data
RAM.
ADC select forward
1
0
1
0
1
0
Correspondence between the display
data RAM address and SEG output
(Forward)
10
ADC select reverse
1
0
1
0
1
0
1
0
Correspondence between the display
data RAM address and SEG output
(Reverse)
Normal display
1
0
1
0
1
0
1
0
EL display normal
11
Reverse display
1
0
1
0
1
0
1
0
EL display reverse
Normal display
1
0
1
0
1
0
1
0
Normal EL display
12
Display all-ON
1
0
1
0
1
0
1
0
1
0
EL display all ON
13 Read-modify-write
1
0
1
0
Increments the column address (by
+1) during a write only.
14 End
1
0
1
0
1
0
Releases the read-modify-write state.
15 Reset
1
0
1
0
1
0
Internal reset
Scanning COM outputs in
forward direction
1
0
*
0
1
0
COM output scanning direction
forward
16
Scanning COM outputs in
reverse direction
1
0
1
*
0
1
0
COM output scanning direction
reverse
1
0
1
0
1
0
1
0
Cathode driver output “L” level during
discharging
17 Cathode drive set 1
1
0
1
0
1
0
1
0
Cathode driver output “H” level during
discharging
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