- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄190043 > PEDL9352-01 (OKI SEMICONDUCTOR CO., LTD.) 128-Channel Organic EL Driver with Built-in RAM PDF資料下載
參數(shù)資料
| 型號(hào)： | PEDL9352-01 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 128-Channel Organic EL Driver with Built-in RAM |
| 中文描述： | 128通道有機(jī)EL帶內(nèi)置驅(qū)動(dòng)器在RAM |
| 文件頁數(shù)： | 23/53頁 |
| 文件大小： | 302K |
| 代理商： | PEDL9352-01 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當(dāng)前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁
PEDL9352-01
OKI Semiconductor
ML9352
3/53
PIN DESCRIPTION
Function
Pin name
Number
of pins
l/O
Description
D0 to D7
8
l/O
This is an 8-bit bi-directional data bus that can be connected to an
8-bit or 16-bit standard MPU data bus. When a serial interface is
selected (
P/S = “H”):
D7: Serial data input pin (SI)
D6: Serial clock input pin (SCL)
In this case, D0 to D5 will be in the Hi-Z state. D0 to D7 will all be in
the Hi-Z state when the chip select is in the inactive state.
A0
1
I
Normally, the lowest bit of the MPU address bus is connected.
Set this pin to “H” when writing or reading display data, and set to
“L” when entering any other control command or writing any other
control data.
RES
1
I
Initial setting is made by making
RES = “L”. The reset operation is
made during the active level of the RES signal.
CS1
CS2
2
I
These are the chip select signals. The Chip Select of the LSI
becomes active when
CS1 is “L” and also CS2 is “H” and allows
the input/output of data or commands.
RD
(E)
1
I
The active level of this signal is “L” when connected to an
80-series MPU.
This terminal is connected to the
RD signal of the 80-series MPU,
and the data bus of the ML9352 goes into the output state when
this signal is “L”.
The active level of this signal is “H” when connected to a 68-series
MPU.
This pin will be the Enable clock input pin when connected to a
68-series MPU.
WR
(R/
W)
1
I
The active level of this signal is “L” when connected to an
80-series MPU.
This terminal is connected to the
WR signal of the 80-series MPU.
The data on the data bus is latched into the ML9352 at the rising
edge of the
WR signal.
When connected to a 68-series MPU, this pin becomes the input
pin for the Read/Write control signal.
R/
W = “H”: Read, R/W = “L”: Write
MPU
Interface
C86
1
I
This is the pin for selecting the MPU interface type. (This pin has a
pull-down resistor.)
C86 = “H”: 68-Series MPU interface
C86 = “L”: 80-Series MPU interface
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PES.05.403.LLLE14 | 3 CONTACT(S), ALUMINUM, FEMALE, CIRCULAR CONNECTOR, CRIMP, SOCKET |
| PESC-01-40-01-01-L-VT | 42 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER, SOCKET |
| PESC-01-40-02-01-L-VT | 43 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER, SOCKET |
| PESC-01-40-04-01-L-VT | 45 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER, SOCKET |
| PESC-02-40-01-01-L-VT | 43 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER, SOCKET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PEDR1042Z | 制造商:Panasonic Industrial Company 功能描述:ROLLER |
| PEDS82V16520A-01 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:262,144-Word 】 32-Bit 】 2-Bank SGRAM |
| PEDS82V16520A-02 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:262,144-Word 】 32-Bit 】 2-Bank SGRAM |
| PE-DVR16 | 制造商:Night Owl 功能描述:16-Channel 960H DVR with HDMI Output 制造商:NIGHT OWL 功能描述:16-CHNL 960H DVR WITH HDMI NO HDD |
| PE-DVR16-1TB | 制造商:Night Owl 功能描述:16-Channel 960H DVR with HDMI Output and 1TB HDD 制造商:NIGHT OWL 功能描述:16-CHNL 960H DVR WITH HDMI 1TB HDD INCLUDED |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。