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參數(shù)資料
| 型號(hào)： | PEDL9352-01 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 128-Channel Organic EL Driver with Built-in RAM |
| 中文描述： | 128通道有機(jī)EL帶內(nèi)置驅(qū)動(dòng)器在RAM |
| 文件頁(yè)數(shù)： | 19/53頁(yè) |
| 文件大?。?/td> | 302K |
| 代理商： | PEDL9352-01 |
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PEDL9352-01
OKI Semiconductor
ML9352
26/53
Scroll start line set (Write)
This command specifies the scroll start line address in the display data RAM.
The scroll start line is specified by using the scroll start line set command. It is possible to scroll the display screen
by dynamically changing the address using the scroll start line set command.
Line address
A0
D7
D6
D5
D4
D3
D2
D1
D0
00H
0
1
0
01H
0
1
0
1
02H
0
1
0
1
0
1EH
0
1
0
1
0
1FH
0
1
0
1
Write Address Set (2-byte command)
This command specifies the write data of the display data RAM. Since this is a 2-byte command used with a pair
of the write address set mode command and the write address register set command, be sure to use these two
commands sequentially.
The display data RAM allows access to a desired bit by specifying the write address and the column address.
Write Address Set Mode (Write)
The write address register set command is enabled by inputting this command.
When once set to the write address set command, commands other than the write address register set command
cannot be used. This status is released when the write address data is set by the write address register set
command.
A0
D7
D6
D5
D4
D3
D2
D1
DO
0
1
0
1
*
Write address register set (Write)
This command specifies the write address of the display data RAM by setting 6-bit data to the write address
register.
The write address set mode is released when the write address register is set by inputting this command.
Write address
A0
D7
D6
D5
D4
D3
D2
D1
D0
00H
0
*
0
01H
0
*
0
1
02H
0
*
0
1
0
03H
0
*
0
1
04H
0
*
0
1
0
05H
0
*
0
1
0
1
06H
0
*
0
1
0
07H
0
*
0
1
08H
0
*
0
1
0
09H
0
*
0
1
0
1
1EH
0
*
0
1
0
1FH
0
*
0
1
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| PESC-02-40-01-01-L-VT | 43 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SOLDER, SOCKET |
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