參數(shù)資料
型號(hào): PCX7447AVGH1000NB
廠商: Atmel
文件頁(yè)數(shù): 40/52頁(yè)
文件大?。?/td> 0K
描述: IC MPU 32BIT 1000MHZ 360CBGA
標(biāo)準(zhǔn)包裝: 44
處理器類型: PowerPC 32-位 RISC
速度: 1.0GHz
電壓: 1.1V
安裝類型: 表面貼裝
封裝/外殼: 360-CBBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 360-CBGA(25x25)
包裝: 托盤
45
0833E–HIREL–01/07
e2v semiconductors SAS 2007
PC7447A
Figure 12-3. JTAG Interface Connection
Notes:
1. RUN/STOP, normally found on pin 5 of the COP header, is not implemented on the PC7447A. Connect
pin 5 of the COP header to OV
DD with a 10 k pull-up resistor.
2. Key location; pin 14 is not physically present on the COP header.
3. Component not populated. Populate only if debug tool does not drive QACK.
4. Populate only if debug tool uses an open-drain type output and does not actively de-assert QACK.
5. If the JTAG interface is implemented, connect HRESET from the target source to TRST from the COP
header though an AND gate to TRST of the part. If the JTAG interface is not implemented, connect
HRESET from the target source to TRST of the part through a 0
isolation resistor.
6. The COP port and target board should be able to independently assert HRESET and TRST to the pro-
cessor in order to fully control the processor as shown above.
HRESET
HRESET(6)
HRESET
13
SRESET
11
VDD_SENSE
6
5(1)
15
2 k
10 k
10 k
10 k
OVDD
CHKSTP_IN
8
TMS
TDO
TDI
TCK
TMS
TDO
TDI
TCK
9
1
3
4
TRST
7
16
2
10
14(2)
Key
QACK
OVDD
TRST(6)
10 k
10 k
10 k
10 k
OVDD
QACK
CHKSTP_OUT
3
13
9
5
1
6
10
2
15
11
7
16
12
8
4
KEY
No Pin
COP Connector
Physical Pin Out
10 k
(4)
OVDD
1
2 k
(3)
0
(5)
12
NC
From Target
Board Sources
(if any)
COP
Header
10 k
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